xref: /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dp/cdn_dp.h (revision 61f72a34250d063da67f4fc2b0eb8c3fda3376be)
1 /*
2  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __SOC_ROCKCHIP_RK3399_DP_H__
8 #define __SOC_ROCKCHIP_RK3399_DP_H__
9 #include <plat_private.h>
10 
11 enum {
12 	CDN_DP_HDCP_1X_KSV_LEN = 5,
13 	CDN_DP_HDCP_KSV_LEN = 8,
14 	CDN_DP_HDCP_RESERVED_LEN = 10,
15 	CDN_DP_HDCP_UID_LEN = 16,
16 	CDN_DP_HDCP_SHA_LEN = 20,
17 	CDN_DP_HDCP_DPK_LEN = 280,
18 	CDN_DP_HDCP_1X_KEYS_LEN	= 285,
19 	CDN_DP_HDCP_KEY_LEN = 326,
20 };
21 
22 struct cdn_dp_hdcp_key_1x {
23 	uint8_t ksv[CDN_DP_HDCP_KSV_LEN];
24 	uint8_t device_key[CDN_DP_HDCP_DPK_LEN];
25 	uint8_t sha1[CDN_DP_HDCP_SHA_LEN];
26 	uint8_t uid[CDN_DP_HDCP_UID_LEN];
27 	uint16_t seed;
28 	uint8_t reserved[CDN_DP_HDCP_RESERVED_LEN];
29 };
30 
31 #define HDCP_KEY_DATA_START_TRANSFER	0
32 #define HDCP_KEY_DATA_START_DECRYPT	1
33 #define HDCP_KEY_1X_STORE_DATA_ALIGN_SIZE	(6 * 64) / 8
34 
35 /* Checks the cdn_dp_hdcp_key_1x must be aligned on 6 x 64-bit word boundary */
36 CASSERT(sizeof(struct cdn_dp_hdcp_key_1x) % HDCP_KEY_1X_STORE_DATA_ALIGN_SIZE, \
37 	assert_hdcp_key_1x_store_data_align_size_mismatch);
38 
39 uint64_t dp_hdcp_ctrl(uint64_t type);
40 
41 uint64_t dp_hdcp_store_key(uint64_t x1,
42 			   uint64_t x2,
43 			   uint64_t x3,
44 			   uint64_t x4,
45 			   uint64_t x5,
46 			   uint64_t x6);
47 #endif
48