1*bc5c3007SLin Huang/* 2*bc5c3007SLin Huang * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*bc5c3007SLin Huang * 4*bc5c3007SLin Huang * SPDX-License-Identifier: BSD-3-Clause 5*bc5c3007SLin Huang */ 6*bc5c3007SLin Huang#ifndef __ROCKCHIP_PLAT_LD_S__ 7*bc5c3007SLin Huang#define __ROCKCHIP_PLAT_LD_S__ 8*bc5c3007SLin Huang 9*bc5c3007SLin HuangMEMORY { 10*bc5c3007SLin Huang PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE 11*bc5c3007SLin Huang} 12*bc5c3007SLin Huang 13*bc5c3007SLin HuangSECTIONS 14*bc5c3007SLin Huang{ 15*bc5c3007SLin Huang . = PMUSRAM_BASE; 16*bc5c3007SLin Huang 17*bc5c3007SLin Huang /* 18*bc5c3007SLin Huang * pmu_cpuson_entrypoint request address 19*bc5c3007SLin Huang * align 64K when resume, so put it in the 20*bc5c3007SLin Huang * start of pmusram 21*bc5c3007SLin Huang */ 22*bc5c3007SLin Huang .text_pmusram : { 23*bc5c3007SLin Huang ASSERT(. == ALIGN(64 * 1024), 24*bc5c3007SLin Huang ".pmusram.entry request 64K aligned."); 25*bc5c3007SLin Huang *(.pmusram.entry) 26*bc5c3007SLin Huang __bl31_pmusram_text_start = .; 27*bc5c3007SLin Huang *(.pmusram.text) 28*bc5c3007SLin Huang *(.pmusram.rodata) 29*bc5c3007SLin Huang __bl31_pmusram_text_end = .; 30*bc5c3007SLin Huang __bl31_pmusram_data_start = .; 31*bc5c3007SLin Huang *(.pmusram.data) 32*bc5c3007SLin Huang __bl31_pmusram_data_end = .; 33*bc5c3007SLin Huang 34*bc5c3007SLin Huang } >PMUSRAM 35*bc5c3007SLin Huang} 36*bc5c3007SLin Huang 37*bc5c3007SLin Huang#endif /* __ROCKCHIP_PLAT_LD_S__ */ 38