1bc5c3007SLin Huang/* 2bc5c3007SLin Huang * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3bc5c3007SLin Huang * 4bc5c3007SLin Huang * SPDX-License-Identifier: BSD-3-Clause 5bc5c3007SLin Huang */ 6*c3cf06f1SAntonio Nino Diaz#ifndef ROCKCHIP_PLAT_LD_S 7*c3cf06f1SAntonio Nino Diaz#define ROCKCHIP_PLAT_LD_S 8bc5c3007SLin Huang 9bc5c3007SLin HuangMEMORY { 10bc5c3007SLin Huang PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE 11bc5c3007SLin Huang} 12bc5c3007SLin Huang 13bc5c3007SLin HuangSECTIONS 14bc5c3007SLin Huang{ 15bc5c3007SLin Huang . = PMUSRAM_BASE; 16bc5c3007SLin Huang 17bc5c3007SLin Huang /* 18bc5c3007SLin Huang * pmu_cpuson_entrypoint request address 19bc5c3007SLin Huang * align 64K when resume, so put it in the 20bc5c3007SLin Huang * start of pmusram 21bc5c3007SLin Huang */ 22bc5c3007SLin Huang .text_pmusram : { 23bc5c3007SLin Huang ASSERT(. == ALIGN(64 * 1024), 24bc5c3007SLin Huang ".pmusram.entry request 64K aligned."); 25bc5c3007SLin Huang *(.pmusram.entry) 26bc5c3007SLin Huang __bl31_pmusram_text_start = .; 27bc5c3007SLin Huang *(.pmusram.text) 28bc5c3007SLin Huang *(.pmusram.rodata) 29bc5c3007SLin Huang __bl31_pmusram_text_end = .; 30bc5c3007SLin Huang __bl31_pmusram_data_start = .; 31bc5c3007SLin Huang *(.pmusram.data) 32bc5c3007SLin Huang __bl31_pmusram_data_end = .; 33bc5c3007SLin Huang 34bc5c3007SLin Huang } >PMUSRAM 35bc5c3007SLin Huang} 36bc5c3007SLin Huang 37*c3cf06f1SAntonio Nino Diaz#endif /* ROCKCHIP_PLAT_LD_S */ 38