10d5ec955Stony.xie/* 2*bc5c3007SLin Huang * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 30d5ec955Stony.xie * 4c3e70be1Sdp-arm * SPDX-License-Identifier: BSD-3-Clause 50d5ec955Stony.xie */ 60d5ec955Stony.xie#ifndef __ROCKCHIP_PLAT_LD_S__ 70d5ec955Stony.xie#define __ROCKCHIP_PLAT_LD_S__ 80d5ec955Stony.xie 90d5ec955Stony.xieMEMORY { 10*bc5c3007SLin Huang PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE 110d5ec955Stony.xie} 120d5ec955Stony.xie 130d5ec955Stony.xieSECTIONS 140d5ec955Stony.xie{ 15*bc5c3007SLin Huang . = PMUSRAM_BASE; 160d5ec955Stony.xie 170d5ec955Stony.xie /* 18*bc5c3007SLin Huang * pmu_cpuson_entrypoint request address 19*bc5c3007SLin Huang * align 64K when resume, so put it in the 20*bc5c3007SLin Huang * start of pmusram 210d5ec955Stony.xie */ 22*bc5c3007SLin Huang .text_pmusram : { 23*bc5c3007SLin Huang ASSERT(. == ALIGN(64 * 1024), 24*bc5c3007SLin Huang ".pmusram.entry request 64K aligned."); 25*bc5c3007SLin Huang *(.pmusram.entry) 26*bc5c3007SLin Huang __bl31_pmusram_text_start = .; 27*bc5c3007SLin Huang *(.pmusram.text) 28*bc5c3007SLin Huang *(.pmusram.rodata) 29*bc5c3007SLin Huang __bl31_pmusram_text_end = .; 30*bc5c3007SLin Huang __bl31_pmusram_data_start = .; 31*bc5c3007SLin Huang *(.pmusram.data) 32*bc5c3007SLin Huang __bl31_pmusram_data_end = .; 330d5ec955Stony.xie 34*bc5c3007SLin Huang } >PMUSRAM 350d5ec955Stony.xie} 360d5ec955Stony.xie 370d5ec955Stony.xie#endif /* __ROCKCHIP_PLAT_LD_S__ */ 38