xref: /rk3399_ARM-atf/plat/rockchip/px30/drivers/secure/secure.h (revision 044b22a0537a46d57337befb2b5cca5f83f8d0a4)
1*d2483afaSHeiko Stuebner /*
2*d2483afaSHeiko Stuebner  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3*d2483afaSHeiko Stuebner  *
4*d2483afaSHeiko Stuebner  * SPDX-License-Identifier: BSD-3-Clause
5*d2483afaSHeiko Stuebner  */
6*d2483afaSHeiko Stuebner 
7*d2483afaSHeiko Stuebner #ifndef SECURE_H
8*d2483afaSHeiko Stuebner #define SECURE_H
9*d2483afaSHeiko Stuebner 
10*d2483afaSHeiko Stuebner /***************************************************************************
11*d2483afaSHeiko Stuebner  * SGRF
12*d2483afaSHeiko Stuebner  ***************************************************************************/
13*d2483afaSHeiko Stuebner #define SGRF_SOC_CON(i)		((i) * 0x4)
14*d2483afaSHeiko Stuebner #define SGRF_DMAC_CON(i)	(0x30 + (i) * 0x4)
15*d2483afaSHeiko Stuebner 
16*d2483afaSHeiko Stuebner #define SGRF_MST_S_ALL_NS	0xffffffff
17*d2483afaSHeiko Stuebner #define SGRF_SLV_S_ALL_NS	0xffff0000
18*d2483afaSHeiko Stuebner #define DMA_IRQ_BOOT_NS		0xffffffff
19*d2483afaSHeiko Stuebner #define DMA_PERI_CH_NS_15_0	0xffffffff
20*d2483afaSHeiko Stuebner #define DMA_PERI_CH_NS_19_16	0x000f000f
21*d2483afaSHeiko Stuebner #define DMA_MANAGER_BOOT_NS	0x00010001
22*d2483afaSHeiko Stuebner #define DMA_SOFTRST_REQ		BITS_WITH_WMASK(1, 0x1, 12)
23*d2483afaSHeiko Stuebner #define DMA_SOFTRST_RLS		BITS_WITH_WMASK(0, 0x1, 12)
24*d2483afaSHeiko Stuebner 
25*d2483afaSHeiko Stuebner /***************************************************************************
26*d2483afaSHeiko Stuebner  * DDR FIREWALL
27*d2483afaSHeiko Stuebner  ***************************************************************************/
28*d2483afaSHeiko Stuebner #define FIREWALL_DDR_FW_DDR_RGN(i)	((i) * 0x4)
29*d2483afaSHeiko Stuebner #define FIREWALL_DDR_FW_DDR_MST(i)	(0x20 + (i) * 0x4)
30*d2483afaSHeiko Stuebner #define FIREWALL_DDR_FW_DDR_CON_REG	0x40
31*d2483afaSHeiko Stuebner #define FIREWALL_DDR_FW_DDR_RGN_NUM	8
32*d2483afaSHeiko Stuebner #define FIREWALL_DDR_FW_DDR_MST_NUM	6
33*d2483afaSHeiko Stuebner 
34*d2483afaSHeiko Stuebner #define PLAT_MAX_DDR_CAPACITY_MB	4096
35*d2483afaSHeiko Stuebner #define RG_MAP_SECURE(top, base)	((((top) - 1) << 16) | (base))
36*d2483afaSHeiko Stuebner 
37*d2483afaSHeiko Stuebner /**************************************************
38*d2483afaSHeiko Stuebner  * secure timer
39*d2483afaSHeiko Stuebner  **************************************************/
40*d2483afaSHeiko Stuebner 
41*d2483afaSHeiko Stuebner /* chanal0~5 */
42*d2483afaSHeiko Stuebner #define STIMER_CHN_BASE(n)	(STIME_BASE + 0x20 * (n))
43*d2483afaSHeiko Stuebner 
44*d2483afaSHeiko Stuebner #define TIMER_LOAD_COUNT0	0x0
45*d2483afaSHeiko Stuebner #define TIMER_LOAD_COUNT1	0x4
46*d2483afaSHeiko Stuebner 
47*d2483afaSHeiko Stuebner #define TIMER_CUR_VALUE0	0x8
48*d2483afaSHeiko Stuebner #define TIMER_CUR_VALUE1	0xc
49*d2483afaSHeiko Stuebner 
50*d2483afaSHeiko Stuebner #define TIMER_CONTROL_REG	0x10
51*d2483afaSHeiko Stuebner #define TIMER_INTSTATUS		0x18
52*d2483afaSHeiko Stuebner 
53*d2483afaSHeiko Stuebner #define TIMER_DIS		0x0
54*d2483afaSHeiko Stuebner #define TIMER_EN		0x1
55*d2483afaSHeiko Stuebner 
56*d2483afaSHeiko Stuebner #define TIMER_FMODE		(0x0 << 1)
57*d2483afaSHeiko Stuebner #define TIMER_RMODE		(0x1 << 1)
58*d2483afaSHeiko Stuebner 
59*d2483afaSHeiko Stuebner #define TIMER_LOAD_COUNT0_MSK	(0xffffffff)
60*d2483afaSHeiko Stuebner #define TIMER_LOAD_COUNT1_MSK	(0xffffffff00000000)
61*d2483afaSHeiko Stuebner 
62*d2483afaSHeiko Stuebner void secure_timer_init(void);
63*d2483afaSHeiko Stuebner void sgrf_init(void);
64*d2483afaSHeiko Stuebner 
65*d2483afaSHeiko Stuebner #endif /* SECURE_H */
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