16fba6e04STony Xie /* 26fba6e04STony Xie * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 36fba6e04STony Xie * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 56fba6e04STony Xie */ 66fba6e04STony Xie 76fba6e04STony Xie #include <bl_common.h> 86fba6e04STony Xie #include <gicv2.h> 9*2d6f1f01SAntonio Nino Diaz #include <interrupt_props.h> 106fba6e04STony Xie #include <platform_def.h> 11ed81f3ebSSandrine Bailleux #include <utils.h> 126fba6e04STony Xie 136fba6e04STony Xie /****************************************************************************** 146fba6e04STony Xie * The following functions are defined as weak to allow a platform to override 156fba6e04STony Xie * the way the GICv2 driver is initialised and used. 166fba6e04STony Xie *****************************************************************************/ 176fba6e04STony Xie #pragma weak plat_rockchip_gic_driver_init 186fba6e04STony Xie #pragma weak plat_rockchip_gic_init 196fba6e04STony Xie #pragma weak plat_rockchip_gic_cpuif_enable 206fba6e04STony Xie #pragma weak plat_rockchip_gic_cpuif_disable 216fba6e04STony Xie #pragma weak plat_rockchip_gic_pcpu_init 226fba6e04STony Xie 236fba6e04STony Xie /****************************************************************************** 246fba6e04STony Xie * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 256fba6e04STony Xie * interrupts. 266fba6e04STony Xie *****************************************************************************/ 27*2d6f1f01SAntonio Nino Diaz static const interrupt_prop_t g0_interrupt_props[] = { 28*2d6f1f01SAntonio Nino Diaz PLAT_RK_GICV2_G1S_IRQS 296fba6e04STony Xie }; 306fba6e04STony Xie 316fba6e04STony Xie /* 326fba6e04STony Xie * Ideally `rockchip_gic_data` structure definition should be a `const` but it 336fba6e04STony Xie * is kept as modifiable for overwriting with different GICD and GICC base when 346fba6e04STony Xie * running on FVP with VE memory map. 356fba6e04STony Xie */ 366fba6e04STony Xie gicv2_driver_data_t rockchip_gic_data = { 376fba6e04STony Xie .gicd_base = PLAT_RK_GICD_BASE, 386fba6e04STony Xie .gicc_base = PLAT_RK_GICC_BASE, 39*2d6f1f01SAntonio Nino Diaz .interrupt_props = g0_interrupt_props, 40*2d6f1f01SAntonio Nino Diaz .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props), 416fba6e04STony Xie }; 426fba6e04STony Xie 436fba6e04STony Xie /****************************************************************************** 446fba6e04STony Xie * RockChip common helper to initialize the GICv2 only driver. 456fba6e04STony Xie *****************************************************************************/ 466fba6e04STony Xie void plat_rockchip_gic_driver_init(void) 476fba6e04STony Xie { 486fba6e04STony Xie gicv2_driver_init(&rockchip_gic_data); 496fba6e04STony Xie } 506fba6e04STony Xie 516fba6e04STony Xie void plat_rockchip_gic_init(void) 526fba6e04STony Xie { 536fba6e04STony Xie gicv2_distif_init(); 546fba6e04STony Xie gicv2_pcpu_distif_init(); 556fba6e04STony Xie gicv2_cpuif_enable(); 566fba6e04STony Xie } 576fba6e04STony Xie 586fba6e04STony Xie /****************************************************************************** 596fba6e04STony Xie * RockChip common helper to enable the GICv2 CPU interface 606fba6e04STony Xie *****************************************************************************/ 616fba6e04STony Xie void plat_rockchip_gic_cpuif_enable(void) 626fba6e04STony Xie { 636fba6e04STony Xie gicv2_cpuif_enable(); 646fba6e04STony Xie } 656fba6e04STony Xie 666fba6e04STony Xie /****************************************************************************** 676fba6e04STony Xie * RockChip common helper to disable the GICv2 CPU interface 686fba6e04STony Xie *****************************************************************************/ 696fba6e04STony Xie void plat_rockchip_gic_cpuif_disable(void) 706fba6e04STony Xie { 716fba6e04STony Xie gicv2_cpuif_disable(); 726fba6e04STony Xie } 736fba6e04STony Xie 746fba6e04STony Xie /****************************************************************************** 756fba6e04STony Xie * RockChip common helper to initialize the per cpu distributor interface 766fba6e04STony Xie * in GICv2 776fba6e04STony Xie *****************************************************************************/ 786fba6e04STony Xie void plat_rockchip_gic_pcpu_init(void) 796fba6e04STony Xie { 806fba6e04STony Xie gicv2_pcpu_distif_init(); 816fba6e04STony Xie } 82