xref: /rk3399_ARM-atf/plat/rockchip/common/aarch64/pmu_sram_cpus_on.S (revision 8742f8574bcbb513480c53645dbc5b72ea5f451e)
1*c3aaabafSHeiko Stuebner/*
2*c3aaabafSHeiko Stuebner * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3*c3aaabafSHeiko Stuebner *
4*c3aaabafSHeiko Stuebner * SPDX-License-Identifier: BSD-3-Clause
5*c3aaabafSHeiko Stuebner */
6*c3aaabafSHeiko Stuebner
7*c3aaabafSHeiko Stuebner#include <arch.h>
8*c3aaabafSHeiko Stuebner#include <asm_macros.S>
9*c3aaabafSHeiko Stuebner#include <platform_def.h>
10*c3aaabafSHeiko Stuebner
11*c3aaabafSHeiko Stuebner	.globl pmu_cpuson_entrypoint
12*c3aaabafSHeiko Stuebner	.macro pmusram_entry_func _name
13*c3aaabafSHeiko Stuebner	.section .pmusram.entry, "ax"
14*c3aaabafSHeiko Stuebner	.type \_name, %function
15*c3aaabafSHeiko Stuebner	.cfi_startproc
16*c3aaabafSHeiko Stuebner	\_name:
17*c3aaabafSHeiko Stuebner	.endm
18*c3aaabafSHeiko Stuebner
19*c3aaabafSHeiko Stuebnerpmusram_entry_func pmu_cpuson_entrypoint
20*c3aaabafSHeiko Stuebner
21*c3aaabafSHeiko Stuebner#if PSRAM_CHECK_WAKEUP_CPU
22*c3aaabafSHeiko Stuebnercheck_wake_cpus:
23*c3aaabafSHeiko Stuebner	mrs	x0, MPIDR_EL1
24*c3aaabafSHeiko Stuebner	and	x1, x0, #MPIDR_CPU_MASK
25*c3aaabafSHeiko Stuebner	and	x0, x0, #MPIDR_CLUSTER_MASK
26*c3aaabafSHeiko Stuebner	orr	x0, x0, x1
27*c3aaabafSHeiko Stuebner
28*c3aaabafSHeiko Stuebner	/* primary_cpu */
29*c3aaabafSHeiko Stuebner	ldr	w1, boot_mpidr
30*c3aaabafSHeiko Stuebner	cmp	w0, w1
31*c3aaabafSHeiko Stuebner	b.eq	sys_wakeup
32*c3aaabafSHeiko Stuebner
33*c3aaabafSHeiko Stuebner	/*
34*c3aaabafSHeiko Stuebner	 * If the core is not the primary cpu,
35*c3aaabafSHeiko Stuebner	 * force the core into wfe.
36*c3aaabafSHeiko Stuebner	 */
37*c3aaabafSHeiko Stuebnerwfe_loop:
38*c3aaabafSHeiko Stuebner	wfe
39*c3aaabafSHeiko Stuebner	b	wfe_loop
40*c3aaabafSHeiko Stuebnersys_wakeup:
41*c3aaabafSHeiko Stuebner#endif
42*c3aaabafSHeiko Stuebner
43*c3aaabafSHeiko Stuebner#if PSRAM_DO_DDR_RESUME
44*c3aaabafSHeiko Stuebnerddr_resume:
45*c3aaabafSHeiko Stuebner	ldr	x2, =__bl31_sram_stack_end
46*c3aaabafSHeiko Stuebner	mov     sp, x2
47*c3aaabafSHeiko Stuebner	bl	dmc_resume
48*c3aaabafSHeiko Stuebner#endif
49*c3aaabafSHeiko Stuebner	bl	sram_restore
50*c3aaabafSHeiko Stuebnersys_resume:
51*c3aaabafSHeiko Stuebner	bl	bl31_warm_entrypoint
52*c3aaabafSHeiko Stuebnerendfunc pmu_cpuson_entrypoint
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