1 /* 2 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <string.h> 8 9 #include <platform_def.h> 10 11 #include <arch_helpers.h> 12 #include <common/bl_common.h> 13 #include <common/debug.h> 14 #include <lib/utils.h> 15 #include <lib/xlat_tables/xlat_tables_compat.h> 16 17 #include <plat_private.h> 18 19 void plat_configure_mmu_svc_mon(unsigned long total_base, 20 unsigned long total_size, 21 unsigned long ro_start, 22 unsigned long ro_limit, 23 unsigned long coh_start, 24 unsigned long coh_limit) 25 { 26 mmap_add_region(total_base, total_base, total_size, 27 MT_MEMORY | MT_RW | MT_SECURE); 28 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, 29 MT_MEMORY | MT_RO | MT_SECURE); 30 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, 31 MT_DEVICE | MT_RW | MT_SECURE); 32 mmap_add(plat_rk_mmap); 33 rockchip_plat_mmu_svc_mon(); 34 init_xlat_tables(); 35 enable_mmu_svc_mon(0); 36 } 37 38 unsigned int plat_get_syscnt_freq2(void) 39 { 40 return SYS_COUNTER_FREQ_IN_TICKS; 41 } 42 43 /* 44 * generic pm code does cci handling, but rockchip arm32 platforms 45 * have ever only 1 cluster, so nothing to do. 46 */ 47 void plat_cci_init(void) 48 { 49 } 50 51 void plat_cci_enable(void) 52 { 53 } 54 55 void plat_cci_disable(void) 56 { 57 } 58