xref: /rk3399_ARM-atf/plat/renesas/rcar_gen4/include/rcar_private.h (revision b45b5bacb95d0e2d4539a7869c1ccf90da041498)

/*
 * Copyright (c) 2015-2025, Renesas Electronics Corporation. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef RCAR_PRIVATE_H
#define RCAR_PRIVATE_H

#include <common/bl_common.h>
#include <lib/bakery_lock.h>
#include <lib/el3_runtime/cpu_data.h>
#include <lib/mmio.h>

#include <platform_def.h>

/*
 * This structure represents the superset of information that is passed to
 * BL31 e.g. while passing control to it from BL2 which is bl31_params
 * and bl31_plat_params and its elements
 */
typedef struct bl2_to_bl31_params_mem {
	image_info_t bl32_image_info;
	image_info_t bl33_image_info;
	entry_point_info_t bl33_ep_info;
	entry_point_info_t bl32_ep_info;
} bl2_to_bl31_params_mem_t;

#define RCAR_INSTANTIATE_LOCK	DEFINE_BAKERY_LOCK(rcar_lock)
/*
 * Constants to specify how many bakery locks this platform implements. These
 * are used if the platform chooses not to use coherent memory for bakery lock
 * data structures.
 */
#define RCAR_MAX_BAKERIES	2

/*
 * Definition of structure which holds platform specific per-cpu data. Currently
 * it holds only the bakery lock information for each cpu. Constants to
 * specify how many bakeries this platform implements and bakery ids are
 * specified in rcar_def.h
 */
typedef struct rcar_cpu_data {
	bakery_info_t pcpu_bakery_info[RCAR_MAX_BAKERIES];
} rcar_cpu_data_t;

/*
 * Helper macros for bakery lock api when using the above rcar_cpu_data_t for
 * bakery lock data structures. It assumes that the bakery_info is at the
 * beginning of the platform specific per-cpu data.
 */
#define rcar_lock_init()	bakery_lock_init(&rcar_lock)
#define rcar_lock_get()		bakery_lock_get(&rcar_lock)
#define rcar_lock_release()	bakery_lock_release(&rcar_lock)

/*
 * Ensure that the size of the RCAR specific per-cpu data structure and the size
 * of the memory allocated in generic per-cpu data for the platform are the same
 */
CASSERT(sizeof(rcar_cpu_data_t) == PLAT_PCPU_DATA_SIZE,
	rcar_pcpu_data_size_mismatch);

/* lock for SCMI */
#define RCAR_SCMI_INSTANTIATE_LOCK	spinlock_t rcar_scmi_lock
#define RCAR_SCMI_LOCK_GET_INSTANCE	(&rcar_scmi_lock)

/*
 * Function and variable prototypes
 */
void rcar_configure_mmu_el3(uintptr_t total_base,
			    size_t total_size,
			    uintptr_t ro_start,
			    uintptr_t ro_limit
			    );


void plat_invalidate_icache(void);

void rcar_console_boot_init(void);
void rcar_console_runtime_init(void);

#if (SET_SCMI_PARAM == 1)
void __init plat_rcar_scmi_setup(void);
void rcar_scmi_sys_shutdown(void);
void rcar_scmi_sys_reboot(void);
void rcar_scmi_sys_suspend(void);
const plat_psci_ops_t *plat_rcar_psci_override_pm_ops(plat_psci_ops_t *ops);
#else
static inline void plat_rcar_scmi_setup(void) { }

static inline void rcar_scmi_sys_shutdown(void) { }

static inline void rcar_scmi_sys_reboot(void)
{
	mmio_write_32(RCAR_SRESCR, 0x5AA50000U | BIT(15));
}

static inline void rcar_scmi_sys_suspend(void)
{
	while true;
}

static inline const plat_psci_ops_t *plat_rcar_psci_override_pm_ops(plat_psci_ops_t *ops)
{
	return ops;
}
#endif /* SET_SCMI_PARAM == 1 */

int32_t rcar_cluster_pos_by_mpidr(u_register_t mpidr);

#endif /* RCAR_PRIVATE_H */