1/* 2 * Copyright (c) 2018-2025, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2022-2025, Renesas Electronics Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7#ifndef RCAR_PLAT_LD_S 8#define RCAR_PLAT_LD_S 9 10#include <lib/xlat_tables/xlat_tables_defs.h> 11#include <platform_def.h> 12 13MEMORY { 14 SRAM (rwx): ORIGIN = DEVICE_SRAM_BASE, LENGTH = DEVICE_SRAM_SIZE 15 SRAM_DATA (rwx): ORIGIN = DEVICE_SRAM_DATA_BASE, LENGTH = DEVICE_SRAM_DATA_SIZE 16 PRAM (r) : ORIGIN = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE), 17 LENGTH = DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE 18} 19 20SECTIONS 21{ 22 /* SRAM_COPY is in PRAM (RO) */ 23 . = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE); 24 __SRAM_COPY_START__ = .; 25 26 .system_ram : { 27 /* system ram start is in SRAM */ 28 __system_ram_start__ = .; 29 *(.system_ram) 30 *spinlock.o(.text.*) 31 *scmi_sys_pwr_proto.o( 32 .text.validate_scmi_channel 33 .text.scmi_sys_pwr_state_set 34 ) 35 *scmi_common.o( 36 .text.scmi_get_channel 37 .text.scmi_send_sync_command 38 .text.scmi_put_channel 39 ) 40 __system_ram_end__ = .; 41 } >SRAM AT>PRAM 42 43 /* SRAM variable is in PRAM (RW) */ 44 . = BL31_LIMIT - DEVICE_SRAM_DATA_SIZE; 45 46 .system_ram_data : { 47 __system_ram_data_start__ = .; 48 *(.system_ram_data) 49 __system_ram_data_end__ = .; 50 } >SRAM_DATA AT>PRAM 51 52 ASSERT(__BL31_END__ <= (BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE)), 53 "BL31 image too large - writing on top of SRAM!") 54 55} 56 57#endif /* RCAR_PLAT_LD_S */ 58