xref: /rk3399_ARM-atf/plat/renesas/rcar_gen4/include/plat.ld.S (revision a202529e8ed33bacd10069f4f7df081970f0c752)
1/*
2 * Copyright (c) 2018-2025, ARM Limited and Contributors. All rights reserved.
3 * Copyright (c) 2022-2025, Renesas Electronics Corporation. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7#ifndef RCAR_PLAT_LD_S
8#define RCAR_PLAT_LD_S
9
10#include <lib/xlat_tables/xlat_tables_defs.h>
11#include <platform_def.h>
12
13MEMORY {
14    SRAM      (rwx): ORIGIN = DEVICE_SRAM_BASE, LENGTH = DEVICE_SRAM_SIZE
15    SRAM_DATA (rwx): ORIGIN = DEVICE_SRAM_DATA_BASE, LENGTH = DEVICE_SRAM_DATA_SIZE
16    PRAM      (r)  : ORIGIN = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE),
17                     LENGTH = DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE
18}
19
20SECTIONS
21{
22	/* SRAM_COPY is in PRAM (RO) */
23	. = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE);
24	__SRAM_COPY_START__ = .;
25
26	.system_ram : {
27		/* system ram start is in SRAM */
28		__system_ram_start__ = .;
29		*(.system_ram)
30		*spinlock.o(.text.*)
31	        __system_ram_end__ = .;
32	} >SRAM AT>PRAM
33
34	/* SRAM variable is in PRAM (RW) */
35	. = BL31_LIMIT - DEVICE_SRAM_DATA_SIZE;
36
37	.system_ram_data : {
38		__system_ram_data_start__ = .;
39		*(.system_ram_data)
40	        __system_ram_data_end__ = .;
41	} >SRAM_DATA AT>PRAM
42
43    ASSERT(__BL31_END__ <= (BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE)),
44    "BL31 image too large - writing on top of SRAM!")
45
46}
47
48#endif /* RCAR_PLAT_LD_S */
49