1*011a4c2fSBiju Das /* 2*011a4c2fSBiju Das * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved. 3*011a4c2fSBiju Das * 4*011a4c2fSBiju Das * SPDX-License-Identifier: BSD-3-Clause 5*011a4c2fSBiju Das */ 6*011a4c2fSBiju Das 7*011a4c2fSBiju Das #ifndef RCAR_PRIVATE_H 8*011a4c2fSBiju Das #define RCAR_PRIVATE_H 9*011a4c2fSBiju Das 10*011a4c2fSBiju Das #include <common/bl_common.h> 11*011a4c2fSBiju Das #include <lib/bakery_lock.h> 12*011a4c2fSBiju Das #include <lib/el3_runtime/cpu_data.h> 13*011a4c2fSBiju Das 14*011a4c2fSBiju Das #include <platform_def.h> 15*011a4c2fSBiju Das 16*011a4c2fSBiju Das typedef volatile struct mailbox { 17*011a4c2fSBiju Das unsigned long value __aligned(CACHE_WRITEBACK_GRANULE); 18*011a4c2fSBiju Das } mailbox_t; 19*011a4c2fSBiju Das 20*011a4c2fSBiju Das /* 21*011a4c2fSBiju Das * This structure represents the superset of information that is passed to 22*011a4c2fSBiju Das * BL31 e.g. while passing control to it from BL2 which is bl31_params 23*011a4c2fSBiju Das * and bl31_plat_params and its elements 24*011a4c2fSBiju Das */ 25*011a4c2fSBiju Das typedef struct bl2_to_bl31_params_mem { 26*011a4c2fSBiju Das image_info_t bl32_image_info; 27*011a4c2fSBiju Das image_info_t bl33_image_info; 28*011a4c2fSBiju Das entry_point_info_t bl33_ep_info; 29*011a4c2fSBiju Das entry_point_info_t bl32_ep_info; 30*011a4c2fSBiju Das } bl2_to_bl31_params_mem_t; 31*011a4c2fSBiju Das 32*011a4c2fSBiju Das #if USE_COHERENT_MEM 33*011a4c2fSBiju Das #define RCAR_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(rcar_lock); 34*011a4c2fSBiju Das #define rcar_lock_init() bakery_lock_init(&rcar_lock) 35*011a4c2fSBiju Das #define rcar_lock_get() bakery_lock_get(&rcar_lock) 36*011a4c2fSBiju Das #define rcar_lock_release() bakery_lock_release(&rcar_lock) 37*011a4c2fSBiju Das #else 38*011a4c2fSBiju Das /* 39*011a4c2fSBiju Das * Constants to specify how many bakery locks this platform implements. These 40*011a4c2fSBiju Das * are used if the platform chooses not to use coherent memory for bakery lock 41*011a4c2fSBiju Das * data structures. 42*011a4c2fSBiju Das */ 43*011a4c2fSBiju Das #define RCAR_MAX_BAKERIES 2 44*011a4c2fSBiju Das #define RCAR_PWRC_BAKERY_ID 0 45*011a4c2fSBiju Das 46*011a4c2fSBiju Das /* 47*011a4c2fSBiju Das * Definition of structure which holds platform specific per-cpu data. Currently 48*011a4c2fSBiju Das * it holds only the bakery lock information for each cpu. Constants to 49*011a4c2fSBiju Das * specify how many bakeries this platform implements and bakery ids are 50*011a4c2fSBiju Das * specified in rcar_def.h 51*011a4c2fSBiju Das */ 52*011a4c2fSBiju Das typedef struct rcar_cpu_data { 53*011a4c2fSBiju Das bakery_info_t pcpu_bakery_info[RCAR_MAX_BAKERIES]; 54*011a4c2fSBiju Das } rcar_cpu_data_t; 55*011a4c2fSBiju Das 56*011a4c2fSBiju Das #define RCAR_CPU_DATA_LOCK_OFFSET \ 57*011a4c2fSBiju Das __builtin_offsetof(rcar_cpu_data_t, pcpu_bakery_info) 58*011a4c2fSBiju Das /* 59*011a4c2fSBiju Das * Helper macros for bakery lock api when using the above rcar_cpu_data_t for 60*011a4c2fSBiju Das * bakery lock data structures. It assumes that the bakery_info is at the 61*011a4c2fSBiju Das * beginning of the platform specific per-cpu data. 62*011a4c2fSBiju Das */ 63*011a4c2fSBiju Das #define rcar_lock_init(_lock_arg) 64*011a4c2fSBiju Das 65*011a4c2fSBiju Das #define rcar_lock_get(_lock_arg) \ 66*011a4c2fSBiju Das bakery_lock_get(_lock_arg, \ 67*011a4c2fSBiju Das CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET) 68*011a4c2fSBiju Das 69*011a4c2fSBiju Das #define rcar_lock_release(_lock_arg) \ 70*011a4c2fSBiju Das bakery_lock_release(_lock_arg, \ 71*011a4c2fSBiju Das CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET) 72*011a4c2fSBiju Das /* 73*011a4c2fSBiju Das * Ensure that the size of the RCAR specific per-cpu data structure and the size 74*011a4c2fSBiju Das * of the memory allocated in generic per-cpu data for the platform are the same 75*011a4c2fSBiju Das */ 76*011a4c2fSBiju Das CASSERT(sizeof(rcar_cpu_data_t) == PLAT_PCPU_DATA_SIZE, 77*011a4c2fSBiju Das rcar_pcpu_data_size_mismatch); 78*011a4c2fSBiju Das #endif 79*011a4c2fSBiju Das /* 80*011a4c2fSBiju Das * Function and variable prototypes 81*011a4c2fSBiju Das */ 82*011a4c2fSBiju Das void rcar_configure_mmu_el3(unsigned long total_base, 83*011a4c2fSBiju Das unsigned long total_size, 84*011a4c2fSBiju Das unsigned long ro_start, unsigned long ro_limit 85*011a4c2fSBiju Das #if USE_COHERENT_MEM 86*011a4c2fSBiju Das , unsigned long coh_start, unsigned long coh_limit 87*011a4c2fSBiju Das #endif 88*011a4c2fSBiju Das ); 89*011a4c2fSBiju Das 90*011a4c2fSBiju Das void rcar_setup_topology(void); 91*011a4c2fSBiju Das void rcar_cci_disable(void); 92*011a4c2fSBiju Das void rcar_cci_enable(void); 93*011a4c2fSBiju Das void rcar_cci_init(void); 94*011a4c2fSBiju Das 95*011a4c2fSBiju Das void plat_invalidate_icache(void); 96*011a4c2fSBiju Das void plat_cci_disable(void); 97*011a4c2fSBiju Das void plat_cci_enable(void); 98*011a4c2fSBiju Das void plat_cci_init(void); 99*011a4c2fSBiju Das 100*011a4c2fSBiju Das void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit); 101*011a4c2fSBiju Das void cpg_write(uintptr_t regadr, uint32_t regval); 102*011a4c2fSBiju Das 103*011a4c2fSBiju Das void rcar_console_boot_init(void); 104*011a4c2fSBiju Das void rcar_console_boot_end(void); 105*011a4c2fSBiju Das void rcar_console_runtime_init(void); 106*011a4c2fSBiju Das void rcar_console_runtime_end(void); 107*011a4c2fSBiju Das 108*011a4c2fSBiju Das #endif /* RCAR_PRIVATE_H */ 109