1/* 2 * Copyright (c) 2015-2025, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <drivers/arm/cci.h> 8#include <drivers/arm/gic_common.h> 9#include <drivers/arm/gicv2.h> 10 11#include "rcar_def.h" 12 13.section .rodata.gic_reg_name, "aS" 14gicc_regs: 15 .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 16gicd_pend_reg: 17 .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" 18newline: 19 .asciz "\n" 20spacer: 21 .asciz ":\t\t0x" 22 23 /* --------------------------------------------- 24 * The below macro prints out relevant GIC 25 * registers whenever an unhandled exception is 26 * taken in BL3-1. 27 * Clobbers: x0 - x10, x16, x17, sp 28 * --------------------------------------------- 29 */ 30 .macro plat_print_gic_regs 31 mov_imm x17, RCAR_GICC_BASE 32 mov_imm x16, RCAR_GICD_BASE 33print_gicc_regs: 34 /* gicc base address is now in x17 */ 35 adr x6, gicc_regs /* Load the gicc reg list to x6 */ 36 /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ 37 ldr w8, [x17, #GICC_HPPIR] 38 ldr w9, [x17, #GICC_AHPPIR] 39 ldr w10, [x17, #GICC_CTLR] 40 /* Store to the crash buf and print to console */ 41 bl str_in_crash_buf_print 42 43 /* Print the GICD_ISPENDR regs */ 44 add x7, x16, #GICD_ISPENDR 45 adr x4, gicd_pend_reg 46 bl asm_print_str 47gicd_ispendr_loop: 48 sub x4, x7, x16 49 cmp x4, #0x280 50 b.eq exit_print_gic_regs 51 bl asm_print_hex 52 adr x4, spacer 53 bl asm_print_str 54 ldr x4, [x7], #8 55 bl asm_print_hex 56 adr x4, newline 57 bl asm_print_str 58 b gicd_ispendr_loop 59exit_print_gic_regs: 60 .endm 61