xref: /rk3399_ARM-atf/plat/qti/qtiseclib/src/qtiseclib_interface_stub.c (revision 5bd9c17d023288e6b819fa3eecc01b7981399cfa)
1*5bd9c17dSSaurabh Gorecha /*
2*5bd9c17dSSaurabh Gorecha  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3*5bd9c17dSSaurabh Gorecha  *
4*5bd9c17dSSaurabh Gorecha  * SPDX-License-Identifier: BSD-3-Clause
5*5bd9c17dSSaurabh Gorecha  */
6*5bd9c17dSSaurabh Gorecha 
7*5bd9c17dSSaurabh Gorecha #include <stdbool.h>
8*5bd9c17dSSaurabh Gorecha #include <stdint.h>
9*5bd9c17dSSaurabh Gorecha 
10*5bd9c17dSSaurabh Gorecha #include <common/debug.h>
11*5bd9c17dSSaurabh Gorecha 
12*5bd9c17dSSaurabh Gorecha #include <qtiseclib_defs.h>
13*5bd9c17dSSaurabh Gorecha #include <qtiseclib_interface.h>
14*5bd9c17dSSaurabh Gorecha 
15*5bd9c17dSSaurabh Gorecha /*
16*5bd9c17dSSaurabh Gorecha  * This file contains dummy implementation of QTISECLIB Published API's.
17*5bd9c17dSSaurabh Gorecha  * which will be used to compile PLATFORM successfully when
18*5bd9c17dSSaurabh Gorecha  * qtiseclib is not available
19*5bd9c17dSSaurabh Gorecha  */
20*5bd9c17dSSaurabh Gorecha 
21*5bd9c17dSSaurabh Gorecha /*
22*5bd9c17dSSaurabh Gorecha  * CPUSS common reset handler for all CPU wake up (both cold & warm boot).
23*5bd9c17dSSaurabh Gorecha  * Executes on all core. This API assume serialization across CPU
24*5bd9c17dSSaurabh Gorecha  * already taken care before invoking.
25*5bd9c17dSSaurabh Gorecha  *
26*5bd9c17dSSaurabh Gorecha  * Clobbers: x0 - x17, x30
27*5bd9c17dSSaurabh Gorecha  */
28*5bd9c17dSSaurabh Gorecha void qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state)
29*5bd9c17dSSaurabh Gorecha {
30*5bd9c17dSSaurabh Gorecha }
31*5bd9c17dSSaurabh Gorecha 
32*5bd9c17dSSaurabh Gorecha /*
33*5bd9c17dSSaurabh Gorecha  * Execute CPU (Kryo4 gold) specific reset handler / system initialization.
34*5bd9c17dSSaurabh Gorecha  * This takes care of executing required CPU errata's.
35*5bd9c17dSSaurabh Gorecha  *
36*5bd9c17dSSaurabh Gorecha  * Clobbers: x0 - x16
37*5bd9c17dSSaurabh Gorecha  */
38*5bd9c17dSSaurabh Gorecha void qtiseclib_kryo4_gold_reset_asm(void)
39*5bd9c17dSSaurabh Gorecha {
40*5bd9c17dSSaurabh Gorecha }
41*5bd9c17dSSaurabh Gorecha 
42*5bd9c17dSSaurabh Gorecha /*
43*5bd9c17dSSaurabh Gorecha  * Execute CPU (Kryo4 silver) specific reset handler / system initialization.
44*5bd9c17dSSaurabh Gorecha  * This takes care of executing required CPU errata's.
45*5bd9c17dSSaurabh Gorecha  *
46*5bd9c17dSSaurabh Gorecha  * Clobbers: x0 - x16
47*5bd9c17dSSaurabh Gorecha  */
48*5bd9c17dSSaurabh Gorecha void qtiseclib_kryo4_silver_reset_asm(void)
49*5bd9c17dSSaurabh Gorecha {
50*5bd9c17dSSaurabh Gorecha }
51*5bd9c17dSSaurabh Gorecha 
52*5bd9c17dSSaurabh Gorecha /*
53*5bd9c17dSSaurabh Gorecha  * C Api's
54*5bd9c17dSSaurabh Gorecha  */
55*5bd9c17dSSaurabh Gorecha void qtiseclib_bl31_platform_setup(void)
56*5bd9c17dSSaurabh Gorecha {
57*5bd9c17dSSaurabh Gorecha 	ERROR("Please use QTISECLIB_PATH while building TF-A\n");
58*5bd9c17dSSaurabh Gorecha 	ERROR("Please refer docs/plat/qti.rst for more details.\n");
59*5bd9c17dSSaurabh Gorecha 	panic();
60*5bd9c17dSSaurabh Gorecha }
61*5bd9c17dSSaurabh Gorecha 
62*5bd9c17dSSaurabh Gorecha void qtiseclib_invoke_isr(uint32_t irq, void *handle)
63*5bd9c17dSSaurabh Gorecha {
64*5bd9c17dSSaurabh Gorecha }
65*5bd9c17dSSaurabh Gorecha 
66*5bd9c17dSSaurabh Gorecha void qtiseclib_panic(void)
67*5bd9c17dSSaurabh Gorecha {
68*5bd9c17dSSaurabh Gorecha }
69*5bd9c17dSSaurabh Gorecha 
70*5bd9c17dSSaurabh Gorecha int qtiseclib_prng_get_data(uint8_t *out, uint32_t out_len)
71*5bd9c17dSSaurabh Gorecha {
72*5bd9c17dSSaurabh Gorecha 	/* fill dummy data to avoid assert and print
73*5bd9c17dSSaurabh Gorecha 	 * stub implementation in setup call
74*5bd9c17dSSaurabh Gorecha 	 */
75*5bd9c17dSSaurabh Gorecha 	for (int i = 0; i < out_len; i++) {
76*5bd9c17dSSaurabh Gorecha 		out[i] = 0x11;
77*5bd9c17dSSaurabh Gorecha 	}
78*5bd9c17dSSaurabh Gorecha 	return 0;
79*5bd9c17dSSaurabh Gorecha }
80*5bd9c17dSSaurabh Gorecha 
81*5bd9c17dSSaurabh Gorecha int
82*5bd9c17dSSaurabh Gorecha qtiseclib_mem_assign(const memprot_info_t *mem_info,
83*5bd9c17dSSaurabh Gorecha 		     uint32_t mem_info_list_cnt,
84*5bd9c17dSSaurabh Gorecha 		     const uint32_t *source_vm_list,
85*5bd9c17dSSaurabh Gorecha 		     uint32_t src_vm_list_cnt,
86*5bd9c17dSSaurabh Gorecha 		     const memprot_dst_vm_perm_info_t *dest_vm_list,
87*5bd9c17dSSaurabh Gorecha 		     uint32_t dst_vm_list_cnt)
88*5bd9c17dSSaurabh Gorecha {
89*5bd9c17dSSaurabh Gorecha 	return 0;
90*5bd9c17dSSaurabh Gorecha }
91*5bd9c17dSSaurabh Gorecha 
92*5bd9c17dSSaurabh Gorecha int qtiseclib_psci_init(uintptr_t warmboot_entry)
93*5bd9c17dSSaurabh Gorecha {
94*5bd9c17dSSaurabh Gorecha 	return 0;
95*5bd9c17dSSaurabh Gorecha }
96*5bd9c17dSSaurabh Gorecha 
97*5bd9c17dSSaurabh Gorecha int qtiseclib_psci_node_power_on(u_register_t mpidr)
98*5bd9c17dSSaurabh Gorecha {
99*5bd9c17dSSaurabh Gorecha 	return 0;
100*5bd9c17dSSaurabh Gorecha }
101*5bd9c17dSSaurabh Gorecha 
102*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_on_finish(const uint8_t *states)
103*5bd9c17dSSaurabh Gorecha {
104*5bd9c17dSSaurabh Gorecha }
105*5bd9c17dSSaurabh Gorecha 
106*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_cpu_standby(uint8_t pwr_state)
107*5bd9c17dSSaurabh Gorecha {
108*5bd9c17dSSaurabh Gorecha }
109*5bd9c17dSSaurabh Gorecha 
110*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_power_off(const uint8_t *states)
111*5bd9c17dSSaurabh Gorecha {
112*5bd9c17dSSaurabh Gorecha }
113*5bd9c17dSSaurabh Gorecha 
114*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_suspend(const uint8_t *states)
115*5bd9c17dSSaurabh Gorecha {
116*5bd9c17dSSaurabh Gorecha }
117*5bd9c17dSSaurabh Gorecha 
118*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_suspend_finish(const uint8_t *states)
119*5bd9c17dSSaurabh Gorecha {
120*5bd9c17dSSaurabh Gorecha }
121*5bd9c17dSSaurabh Gorecha 
122*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_system_off(void)
123*5bd9c17dSSaurabh Gorecha {
124*5bd9c17dSSaurabh Gorecha 	while (1) {
125*5bd9c17dSSaurabh Gorecha 	};
126*5bd9c17dSSaurabh Gorecha }
127*5bd9c17dSSaurabh Gorecha 
128*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_system_reset(void)
129*5bd9c17dSSaurabh Gorecha {
130*5bd9c17dSSaurabh Gorecha 	while (1) {
131*5bd9c17dSSaurabh Gorecha 	};
132*5bd9c17dSSaurabh Gorecha }
133*5bd9c17dSSaurabh Gorecha 
134*5bd9c17dSSaurabh Gorecha void qtiseclib_disable_cluster_coherency(uint8_t state)
135*5bd9c17dSSaurabh Gorecha {
136*5bd9c17dSSaurabh Gorecha }
137*5bd9c17dSSaurabh Gorecha 
138