1*5bd9c17dSSaurabh Gorecha /* 2*5bd9c17dSSaurabh Gorecha * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 3*5bd9c17dSSaurabh Gorecha * 4*5bd9c17dSSaurabh Gorecha * SPDX-License-Identifier: BSD-3-Clause 5*5bd9c17dSSaurabh Gorecha */ 6*5bd9c17dSSaurabh Gorecha 7*5bd9c17dSSaurabh Gorecha #ifndef QTISECLIB_INTERFACE_H 8*5bd9c17dSSaurabh Gorecha #define QTISECLIB_INTERFACE_H 9*5bd9c17dSSaurabh Gorecha 10*5bd9c17dSSaurabh Gorecha #include <stdbool.h> 11*5bd9c17dSSaurabh Gorecha #include <stdint.h> 12*5bd9c17dSSaurabh Gorecha 13*5bd9c17dSSaurabh Gorecha #include <qtiseclib_defs.h> 14*5bd9c17dSSaurabh Gorecha 15*5bd9c17dSSaurabh Gorecha typedef struct memprot_ipa_info_s { 16*5bd9c17dSSaurabh Gorecha uint64_t mem_addr; 17*5bd9c17dSSaurabh Gorecha uint64_t mem_size; 18*5bd9c17dSSaurabh Gorecha } memprot_info_t; 19*5bd9c17dSSaurabh Gorecha 20*5bd9c17dSSaurabh Gorecha typedef struct memprot_dst_vm_perm_info_s { 21*5bd9c17dSSaurabh Gorecha uint32_t dst_vm; 22*5bd9c17dSSaurabh Gorecha uint32_t dst_vm_perm; 23*5bd9c17dSSaurabh Gorecha uint64_t ctx; 24*5bd9c17dSSaurabh Gorecha uint32_t ctx_size; 25*5bd9c17dSSaurabh Gorecha } memprot_dst_vm_perm_info_t; 26*5bd9c17dSSaurabh Gorecha 27*5bd9c17dSSaurabh Gorecha /* 28*5bd9c17dSSaurabh Gorecha * QTISECLIB Published API's. 29*5bd9c17dSSaurabh Gorecha */ 30*5bd9c17dSSaurabh Gorecha 31*5bd9c17dSSaurabh Gorecha /* 32*5bd9c17dSSaurabh Gorecha * Assembly API's 33*5bd9c17dSSaurabh Gorecha */ 34*5bd9c17dSSaurabh Gorecha 35*5bd9c17dSSaurabh Gorecha /* 36*5bd9c17dSSaurabh Gorecha * CPUSS common reset handler for all CPU wake up (both cold & warm boot). 37*5bd9c17dSSaurabh Gorecha * Executes on all core. This API assume serialization across CPU 38*5bd9c17dSSaurabh Gorecha * already taken care before invoking. 39*5bd9c17dSSaurabh Gorecha * 40*5bd9c17dSSaurabh Gorecha * Clobbers: x0 - x17, x30 41*5bd9c17dSSaurabh Gorecha */ 42*5bd9c17dSSaurabh Gorecha void qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state); 43*5bd9c17dSSaurabh Gorecha 44*5bd9c17dSSaurabh Gorecha /* 45*5bd9c17dSSaurabh Gorecha * Execute CPU (Kryo4 gold) specific reset handler / system initialization. 46*5bd9c17dSSaurabh Gorecha * This takes care of executing required CPU errata's. 47*5bd9c17dSSaurabh Gorecha * 48*5bd9c17dSSaurabh Gorecha * Clobbers: x0 - x16 49*5bd9c17dSSaurabh Gorecha */ 50*5bd9c17dSSaurabh Gorecha void qtiseclib_kryo4_gold_reset_asm(void); 51*5bd9c17dSSaurabh Gorecha 52*5bd9c17dSSaurabh Gorecha /* 53*5bd9c17dSSaurabh Gorecha * Execute CPU (Kryo4 silver) specific reset handler / system initialization. 54*5bd9c17dSSaurabh Gorecha * This takes care of executing required CPU errata's. 55*5bd9c17dSSaurabh Gorecha * 56*5bd9c17dSSaurabh Gorecha * Clobbers: x0 - x16 57*5bd9c17dSSaurabh Gorecha */ 58*5bd9c17dSSaurabh Gorecha void qtiseclib_kryo4_silver_reset_asm(void); 59*5bd9c17dSSaurabh Gorecha 60*5bd9c17dSSaurabh Gorecha /* 61*5bd9c17dSSaurabh Gorecha * C Api's 62*5bd9c17dSSaurabh Gorecha */ 63*5bd9c17dSSaurabh Gorecha void qtiseclib_bl31_platform_setup(void); 64*5bd9c17dSSaurabh Gorecha void qtiseclib_invoke_isr(uint32_t irq, void *handle); 65*5bd9c17dSSaurabh Gorecha void qtiseclib_panic(void); 66*5bd9c17dSSaurabh Gorecha int qtiseclib_prng_get_data(uint8_t *out, uint32_t out_len); 67*5bd9c17dSSaurabh Gorecha 68*5bd9c17dSSaurabh Gorecha int qtiseclib_mem_assign(const memprot_info_t *mem_info, 69*5bd9c17dSSaurabh Gorecha uint32_t mem_info_list_cnt, 70*5bd9c17dSSaurabh Gorecha const uint32_t *source_vm_list, 71*5bd9c17dSSaurabh Gorecha uint32_t src_vm_list_cnt, 72*5bd9c17dSSaurabh Gorecha const memprot_dst_vm_perm_info_t *dest_vm_list, 73*5bd9c17dSSaurabh Gorecha uint32_t dst_vm_list_cnt); 74*5bd9c17dSSaurabh Gorecha 75*5bd9c17dSSaurabh Gorecha int qtiseclib_psci_init(uintptr_t warmboot_entry); 76*5bd9c17dSSaurabh Gorecha int qtiseclib_psci_node_power_on(u_register_t mpidr); 77*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_on_finish(const uint8_t *states); 78*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_cpu_standby(uint8_t pwr_state); 79*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_power_off(const uint8_t *states); 80*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_suspend(const uint8_t *states); 81*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_node_suspend_finish(const uint8_t *states); 82*5bd9c17dSSaurabh Gorecha __attribute__ ((noreturn)) 83*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_system_off(void); 84*5bd9c17dSSaurabh Gorecha __attribute__ ((noreturn)) 85*5bd9c17dSSaurabh Gorecha void qtiseclib_psci_system_reset(void); 86*5bd9c17dSSaurabh Gorecha void qtiseclib_disable_cluster_coherency(uint8_t state); 87*5bd9c17dSSaurabh Gorecha 88*5bd9c17dSSaurabh Gorecha #endif /* QTISECLIB_INTERFACE_H */ 89