xref: /rk3399_ARM-atf/plat/qti/qtiseclib/inc/qcs615/qtiseclib_defs_plat.h (revision f3ad3f48c259b0935a19794ce278913351ea4f4b)
1*f60617d3Squic_assethi /*
2*f60617d3Squic_assethi  * Copyright (c) 2024, The Linux Foundation. All rights reserved.
3*f60617d3Squic_assethi  * SPDX-License-Identifier: BSD-3-Clause
4*f60617d3Squic_assethi  */
5*f60617d3Squic_assethi 
6*f60617d3Squic_assethi #ifndef __QTISECLIB_DEFS_PLAT_H__
7*f60617d3Squic_assethi #define __QTISECLIB_DEFS_PLAT_H__
8*f60617d3Squic_assethi 
9*f60617d3Squic_assethi #define QTISECLIB_PLAT_CLUSTER_COUNT   1
10*f60617d3Squic_assethi #define QTISECLIB_PLAT_CORE_COUNT      8
11*f60617d3Squic_assethi 
12*f60617d3Squic_assethi #define BL31_BASE                0x86200000
13*f60617d3Squic_assethi #define BL31_SIZE                0x00100000
14*f60617d3Squic_assethi 
15*f60617d3Squic_assethi /*----------------------------------------------------------------------------*/
16*f60617d3Squic_assethi /* AOP CMD DB  address space for mapping */
17*f60617d3Squic_assethi /*----------------------------------------------------------------------------*/
18*f60617d3Squic_assethi #define QTI_AOP_CMD_DB_BASE         0x85F20000
19*f60617d3Squic_assethi #define QTI_AOP_CMD_DB_SIZE         0x00020000
20*f60617d3Squic_assethi 
21*f60617d3Squic_assethi /* Chipset specific secure interrupt number/ID defs. */
22*f60617d3Squic_assethi #define QTISECLIB_INT_ID_SEC_WDOG_BARK          (0x204)
23*f60617d3Squic_assethi #define QTISECLIB_INT_ID_NON_SEC_WDOG_BITE      (0x21)
24*f60617d3Squic_assethi 
25*f60617d3Squic_assethi #define QTISECLIB_INT_ID_VMIDMT_ERR_CLT_SEC     (0xE6)
26*f60617d3Squic_assethi #define QTISECLIB_INT_ID_VMIDMT_ERR_CLT_NONSEC  (0xE7)
27*f60617d3Squic_assethi #define QTISECLIB_INT_ID_VMIDMT_ERR_CFG_SEC     (0xE8)
28*f60617d3Squic_assethi #define QTISECLIB_INT_ID_VMIDMT_ERR_CFG_NONSEC  (0xE9)
29*f60617d3Squic_assethi 
30*f60617d3Squic_assethi #define QTISECLIB_INT_ID_XPU_SEC                (0xE3)
31*f60617d3Squic_assethi #define QTISECLIB_INT_ID_XPU_NON_SEC            (0xE4)
32*f60617d3Squic_assethi 
33*f60617d3Squic_assethi //NOC INterrupt
34*f60617d3Squic_assethi #define QTISECLIB_INT_ID_A1_NOC_ERROR        (0x18B)
35*f60617d3Squic_assethi #define QTISECLIB_INT_ID_CONFIG_NOC_ERROR    (0xE2)
36*f60617d3Squic_assethi #define QTISECLIB_INT_ID_DC_NOC_ERROR        (0x122)
37*f60617d3Squic_assethi #define QTISECLIB_INT_ID_MEM_NOC_ERROR       (0x6C) //GEM_NOC
38*f60617d3Squic_assethi #define QTISECLIB_INT_ID_SYSTEM_NOC_ERROR    (0xC6)
39*f60617d3Squic_assethi #define QTISECLIB_INT_ID_MMSS_NOC_ERROR      (0xBA)
40*f60617d3Squic_assethi 
41*f60617d3Squic_assethi #endif /* __QTISECLIB_DEFS_PLAT_H__ */
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