xref: /rk3399_ARM-atf/plat/qti/msm8916/msm8916_pm.c (revision f6088168f0608604bc1cd57d8ab52d848fdb835b)
1 /*
2  * Copyright (c) 2021-2022, Stephan Gerhold <stephan@gerhold.net>
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arch.h>
8 #include <arch_helpers.h>
9 #include <common/debug.h>
10 #include <drivers/arm/gicv2.h>
11 #include <drivers/delay_timer.h>
12 #include <lib/mmio.h>
13 #include <lib/psci/psci.h>
14 #include <plat/common/platform.h>
15 
16 #include <msm8916_mmap.h>
17 #include "msm8916_pm.h"
18 
19 static int msm8916_pwr_domain_on(u_register_t mpidr)
20 {
21 	unsigned int core = MPIDR_AFFLVL0_VAL(mpidr);
22 
23 	VERBOSE("PSCI: Booting CPU %d\n", core);
24 	msm8916_cpu_boot(core);
25 
26 	return PSCI_E_SUCCESS;
27 }
28 
29 static void msm8916_pwr_domain_on_finish(const psci_power_state_t *target_state)
30 {
31 	gicv2_pcpu_distif_init();
32 	gicv2_cpuif_enable();
33 }
34 
35 static void __dead2 msm8916_system_reset(void)
36 {
37 	mmio_write_32(MPM_PS_HOLD, 0);
38 	mdelay(1000);
39 
40 	ERROR("PSCI: System reset failed\n");
41 	panic();
42 }
43 
44 static const plat_psci_ops_t msm8916_psci_ops = {
45 	.pwr_domain_on			= msm8916_pwr_domain_on,
46 	.pwr_domain_on_finish		= msm8916_pwr_domain_on_finish,
47 	.system_off			= msm8916_system_reset,
48 	.system_reset			= msm8916_system_reset,
49 };
50 
51 /* Defined and used in msm8916_helpers.S */
52 extern uintptr_t msm8916_entry_point;
53 
54 int plat_setup_psci_ops(uintptr_t sec_entrypoint,
55 			const plat_psci_ops_t **psci_ops)
56 {
57 	/*
58 	 * The entry point is read with caches off (and even from two different
59 	 * physical addresses when read through the "boot remapper"), so make
60 	 * sure it is flushed to memory.
61 	 */
62 	msm8916_entry_point = sec_entrypoint;
63 	flush_dcache_range((uintptr_t)&msm8916_entry_point, sizeof(uintptr_t));
64 
65 	*psci_ops = &msm8916_psci_ops;
66 	return 0;
67 }
68