1 /* 2 * Copyright (c) 2021-2022, Stephan Gerhold <stephan@gerhold.net> 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <common/debug.h> 12 #include <drivers/arm/cci.h> 13 #include <drivers/arm/gicv2.h> 14 #include <drivers/delay_timer.h> 15 #include <lib/mmio.h> 16 #include <lib/psci/psci.h> 17 #include <plat/common/platform.h> 18 19 #include <msm8916_mmap.h> 20 #include "msm8916_pm.h" 21 22 /* 23 * On platforms with two clusters the index of the APCS memory region is swapped 24 * compared to the MPIDR cluster affinity level: APCS cluster 0 manages CPUs 25 * with cluster affinity level 1, while APCS cluster 1 manages CPUs with level 0. 26 * 27 * On platforms with a single cluster there is only one APCS memory region. 28 */ 29 #if PLATFORM_CLUSTER_COUNT == 2 30 #define MPIDR_APCS_CLUSTER(mpidr) !MPIDR_AFFLVL1_VAL(mpidr) 31 #else 32 #define MPIDR_APCS_CLUSTER(mpidr) 0 33 #endif 34 35 #define CLUSTER_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL1]) 36 37 static int msm8916_pwr_domain_on(u_register_t mpidr) 38 { 39 /* Should be never called on single-core platforms */ 40 if (PLATFORM_CORE_COUNT == 1) { 41 assert(false); 42 return PSCI_E_ALREADY_ON; 43 } 44 45 /* Power on L2 cache and secondary CPU core for the first time */ 46 if (PLATFORM_CLUSTER_COUNT > 1) { 47 msm8916_l2_boot(APCS_GLB(MPIDR_APCS_CLUSTER(mpidr))); 48 } 49 msm8916_cpu_boot(APCS_ALIAS_ACS(MPIDR_APCS_CLUSTER(mpidr), 50 MPIDR_AFFLVL0_VAL(mpidr))); 51 return PSCI_E_SUCCESS; 52 } 53 54 static void msm8916_pwr_domain_on_finish(const psci_power_state_t *target_state) 55 { 56 /* Should be never called on single-core platforms */ 57 if (PLATFORM_CORE_COUNT == 1) { 58 assert(false); 59 return; 60 } 61 62 if (PLATFORM_CLUSTER_COUNT > 1 && 63 CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { 64 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 65 } 66 67 gicv2_pcpu_distif_init(); 68 gicv2_cpuif_enable(); 69 } 70 71 static void __dead2 msm8916_system_reset(void) 72 { 73 mmio_write_32(MPM_PS_HOLD, 0); 74 mdelay(1000); 75 76 ERROR("PSCI: System reset failed\n"); 77 panic(); 78 } 79 80 static const plat_psci_ops_t msm8916_psci_ops = { 81 .pwr_domain_on = msm8916_pwr_domain_on, 82 .pwr_domain_on_finish = msm8916_pwr_domain_on_finish, 83 .system_off = msm8916_system_reset, 84 .system_reset = msm8916_system_reset, 85 }; 86 87 /* Defined and used in msm8916_helpers.S */ 88 extern uintptr_t msm8916_entry_point; 89 90 int plat_setup_psci_ops(uintptr_t sec_entrypoint, 91 const plat_psci_ops_t **psci_ops) 92 { 93 /* 94 * The entry point is read with caches off (and even from two different 95 * physical addresses when read through the "boot remapper"), so make 96 * sure it is flushed to memory. 97 */ 98 msm8916_entry_point = sec_entrypoint; 99 flush_dcache_range((uintptr_t)&msm8916_entry_point, sizeof(uintptr_t)); 100 101 *psci_ops = &msm8916_psci_ops; 102 return 0; 103 } 104