xref: /rk3399_ARM-atf/plat/qti/msm8916/msm8916_pm.c (revision 1d7ed58ff7eb3ee7016c95fb4813651c59e8c7d9)
1 /*
2  * Copyright (c) 2021-2022, Stephan Gerhold <stephan@gerhold.net>
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arch.h>
8 #include <arch_helpers.h>
9 #include <common/debug.h>
10 #include <drivers/arm/gicv2.h>
11 #include <drivers/delay_timer.h>
12 #include <lib/mmio.h>
13 #include <lib/psci/psci.h>
14 #include <plat/common/platform.h>
15 
16 #include <msm8916_mmap.h>
17 #include "msm8916_pm.h"
18 
19 /*
20  * On platforms with two clusters the index of the APCS memory region is swapped
21  * compared to the MPIDR cluster affinity level: APCS cluster 0 manages CPUs
22  * with cluster affinity level 1, while APCS cluster 1 manages CPUs with level 0.
23  *
24  * On platforms with a single cluster there is only one APCS memory region.
25  */
26 #if PLATFORM_CLUSTER_COUNT == 2
27 #define MPIDR_APCS_CLUSTER(mpidr)	!MPIDR_AFFLVL1_VAL(mpidr)
28 #else
29 #define MPIDR_APCS_CLUSTER(mpidr)	0
30 #endif
31 
32 static int msm8916_pwr_domain_on(u_register_t mpidr)
33 {
34 	msm8916_cpu_boot(APCS_ALIAS_ACS(MPIDR_APCS_CLUSTER(mpidr),
35 					MPIDR_AFFLVL0_VAL(mpidr)));
36 	return PSCI_E_SUCCESS;
37 }
38 
39 static void msm8916_pwr_domain_on_finish(const psci_power_state_t *target_state)
40 {
41 	gicv2_pcpu_distif_init();
42 	gicv2_cpuif_enable();
43 }
44 
45 static void __dead2 msm8916_system_reset(void)
46 {
47 	mmio_write_32(MPM_PS_HOLD, 0);
48 	mdelay(1000);
49 
50 	ERROR("PSCI: System reset failed\n");
51 	panic();
52 }
53 
54 static const plat_psci_ops_t msm8916_psci_ops = {
55 	.pwr_domain_on			= msm8916_pwr_domain_on,
56 	.pwr_domain_on_finish		= msm8916_pwr_domain_on_finish,
57 	.system_off			= msm8916_system_reset,
58 	.system_reset			= msm8916_system_reset,
59 };
60 
61 /* Defined and used in msm8916_helpers.S */
62 extern uintptr_t msm8916_entry_point;
63 
64 int plat_setup_psci_ops(uintptr_t sec_entrypoint,
65 			const plat_psci_ops_t **psci_ops)
66 {
67 	/*
68 	 * The entry point is read with caches off (and even from two different
69 	 * physical addresses when read through the "boot remapper"), so make
70 	 * sure it is flushed to memory.
71 	 */
72 	msm8916_entry_point = sec_entrypoint;
73 	flush_dcache_range((uintptr_t)&msm8916_entry_point, sizeof(uintptr_t));
74 
75 	*psci_ops = &msm8916_psci_ops;
76 	return 0;
77 }
78