1/* 2 * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <platform_def.h> 10 11#include <msm8916_mmap.h> 12 13#define APCS_TCM_START_ADDR 0x10 14#define APCS_TCM_REDIRECT_EN_0 BIT_32(0) 15 16 .globl plat_crash_console_init 17 .globl plat_crash_console_putc 18 .globl plat_crash_console_flush 19 .globl plat_panic_handler 20 .globl plat_my_core_pos 21 .globl plat_get_my_entrypoint 22 .globl plat_reset_handler 23 .globl platform_mem_init 24 .globl msm8916_entry_point 25 26 /* ------------------------------------------------- 27 * int plat_crash_console_init(void) 28 * Initialize the crash console. 29 * Out: r0 - 1 on success, 0 on error 30 * Clobber list : r0 - r4 31 * ------------------------------------------------- 32 */ 33func plat_crash_console_init 34 ldr r1, =BLSP_UART_BASE 35 mov r0, #1 36 b console_uartdm_core_init 37endfunc plat_crash_console_init 38 39 /* ------------------------------------------------- 40 * int plat_crash_console_putc(int c) 41 * Print a character on the crash console. 42 * In : r0 - character to be printed 43 * Out: r0 - printed character on success 44 * Clobber list : r1, r2 45 * ------------------------------------------------- 46 */ 47func plat_crash_console_putc 48 ldr r1, =BLSP_UART_BASE 49 b console_uartdm_core_putc 50endfunc plat_crash_console_putc 51 52 /* ------------------------------------------------- 53 * void plat_crash_console_flush(void) 54 * Force a write of all buffered data that has not 55 * been output. 56 * Clobber list : r1, r2 57 * ------------------------------------------------- 58 */ 59func plat_crash_console_flush 60 ldr r1, =BLSP_UART_BASE 61 b console_uartdm_core_flush 62endfunc plat_crash_console_flush 63 64 /* ------------------------------------------------- 65 * void plat_panic_handler(void) __dead 66 * Called when an unrecoverable error occurs. 67 * ------------------------------------------------- 68 */ 69func plat_panic_handler 70 /* Try to shutdown/reset */ 71 ldr r0, =MPM_PS_HOLD 72 mov r1, #0 73 str r1, [r0] 741: b 1b 75endfunc plat_panic_handler 76 77 /* ------------------------------------------------- 78 * unsigned int plat_my_core_pos(void) 79 * Out: r0 - index of the calling CPU 80 * ------------------------------------------------- 81 */ 82func plat_my_core_pos 83 ldcopr r1, MPIDR 84 and r0, r1, #MPIDR_CPU_MASK 85 .if PLATFORM_CLUSTER_COUNT > 1 86 and r1, r1, #MPIDR_CLUSTER_MASK 87 orr r0, r0, r1, LSR #(MPIDR_AFFINITY_BITS - \ 88 PLATFORM_CPU_PER_CLUSTER_SHIFT) 89 .endif 90 bx lr 91endfunc plat_my_core_pos 92 93 /* ------------------------------------------------- 94 * uintptr_t plat_get_my_entrypoint(void) 95 * Distinguish cold and warm boot and return warm boot 96 * entry address if available. 97 * Out: r0 - warm boot entry point or 0 on cold boot 98 * ------------------------------------------------- 99 */ 100func plat_get_my_entrypoint 101 ldr r0, =msm8916_entry_point 102 ldr r0, [r0] 103 cmp r0, #0 104 bxne lr 105 106 /* 107 * Cold boot: Disable TCM redirect to L2 cache as early as 108 * possible to avoid crashes when making use of the cache. 109 */ 110 ldr r1, =APCS_CFG(0) 111 ldr r2, [r1, #APCS_TCM_START_ADDR] 112 and r2, r2, #~APCS_TCM_REDIRECT_EN_0 113 str r2, [r1, #APCS_TCM_START_ADDR] 114 bx lr 115endfunc plat_get_my_entrypoint 116 117 /* ------------------------------------------------- 118 * void platform_mem_init(void) 119 * Performs additional memory initialization early 120 * in the boot process. 121 * ------------------------------------------------- 122 */ 123func platform_mem_init 124 /* Nothing to do here, all memory is already initialized */ 125 bx lr 126endfunc platform_mem_init 127 128 .data 129 .align 3 130 131 /* ------------------------------------------------- 132 * Warm boot entry point for CPU. Set by PSCI code. 133 * ------------------------------------------------- 134 */ 135msm8916_entry_point: 136 .word 0 137