xref: /rk3399_ARM-atf/plat/qti/kodiak/sc7280_chrome/platform.mk (revision 1c63cd61495542b0b52e1b6e484c59ce5c26e0d2)
1*6091f03dSSumit Garg#
2*6091f03dSSumit Garg# Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved.
3*6091f03dSSumit Garg# Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
4*6091f03dSSumit Garg#
5*6091f03dSSumit Garg# SPDX-License-Identifier: BSD-3-Clause
6*6091f03dSSumit Garg#
7*6091f03dSSumit Garg
8*6091f03dSSumit Garg# Make for SC7280 QTI platform.
9*6091f03dSSumit Garg
10*6091f03dSSumit GargQTI_PLAT_PATH		:=	plat/qti
11*6091f03dSSumit GargCHIPSET			:=	kodiak
12*6091f03dSSumit Garg
13*6091f03dSSumit Garg# Turn On Separate code & data.
14*6091f03dSSumit GargSEPARATE_CODE_AND_RODATA	:=	1
15*6091f03dSSumit GargUSE_COHERENT_MEM		:=	0
16*6091f03dSSumit GargWARMBOOT_ENABLE_DCACHE_EARLY	:=	1
17*6091f03dSSumit GargHW_ASSISTED_COHERENCY		:=	1
18*6091f03dSSumit Garg
19*6091f03dSSumit Garg#Enable errata configs for cortex_a78 and cortex_a55
20*6091f03dSSumit GargERRATA_A55_1530923 		:=	1
21*6091f03dSSumit GargERRATA_A78_1941498 		:=	1
22*6091f03dSSumit GargERRATA_A78_1951500 		:=	1
23*6091f03dSSumit Garg
24*6091f03dSSumit Garg# Disable the PSCI platform compatibility layer
25*6091f03dSSumit GargENABLE_PLAT_COMPAT		:=	0
26*6091f03dSSumit Garg
27*6091f03dSSumit Garg# Enable PSCI v1.0 extended state ID format
28*6091f03dSSumit GargPSCI_EXTENDED_STATE_ID	:=  1
29*6091f03dSSumit GargARM_RECOM_STATE_ID_ENC  :=  1
30*6091f03dSSumit GargPSCI_OS_INIT_MODE	:=  1
31*6091f03dSSumit Garg
32*6091f03dSSumit GargCOLD_BOOT_SINGLE_CPU		:=	1
33*6091f03dSSumit GargPROGRAMMABLE_RESET_ADDRESS	:=	1
34*6091f03dSSumit Garg
35*6091f03dSSumit GargRESET_TO_BL31			:=	0
36*6091f03dSSumit Garg
37*6091f03dSSumit Garg# Enable the dynamic translation tables library
38*6091f03dSSumit GargPLAT_XLAT_TABLES_DYNAMIC	:=	1
39*6091f03dSSumit Garg$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
40*6091f03dSSumit Garg
41*6091f03dSSumit GargQTI_SDI_BUILD := 0
42*6091f03dSSumit Garg$(eval $(call assert_boolean,QTI_SDI_BUILD))
43*6091f03dSSumit Garg$(eval $(call add_define,QTI_SDI_BUILD))
44*6091f03dSSumit Garg
45*6091f03dSSumit Garg#disable CTX_INCLUDE_AARCH32_REGS to support sc7280 gold cores
46*6091f03dSSumit Gargoverride CTX_INCLUDE_AARCH32_REGS	:=	0
47*6091f03dSSumit GargWORKAROUND_CVE_2017_5715		:=      0
48*6091f03dSSumit GargDYNAMIC_WORKAROUND_CVE_2018_3639	:=      1
49*6091f03dSSumit Garg# Enable stack protector.
50*6091f03dSSumit GargENABLE_STACK_PROTECTOR := strong
51*6091f03dSSumit Garg
52*6091f03dSSumit Garg
53*6091f03dSSumit GargQTI_EXTERNAL_INCLUDES	:=	-I${QTI_PLAT_PATH}/${CHIPSET}/inc			\
54*6091f03dSSumit Garg				-I${QTI_PLAT_PATH}/${CHIPSET}/${PLAT}/inc		\
55*6091f03dSSumit Garg				-I${QTI_PLAT_PATH}/common/inc				\
56*6091f03dSSumit Garg				-I${QTI_PLAT_PATH}/common/inc/$(ARCH)			\
57*6091f03dSSumit Garg				-I${QTI_PLAT_PATH}/qtiseclib/inc			\
58*6091f03dSSumit Garg				-I${QTI_PLAT_PATH}/qtiseclib/inc/${CHIPSET}		\
59*6091f03dSSumit Garg
60*6091f03dSSumit GargQTI_BL31_SOURCES	:=	$(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_helpers.S	\
61*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_kryo6_silver.S	\
62*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_kryo6_gold.S	\
63*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_uart_console.S	\
64*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/pm_ps_hold.c			\
65*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_stack_protector.c	\
66*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_common.c		\
67*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_bl31_setup.c		\
68*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_gic_v3.c		\
69*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_interrupt_svc.c		\
70*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_syscall.c		\
71*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_topology.c		\
72*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/qti_pm.c			\
73*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/common/src/spmi_arb.c			\
74*6091f03dSSumit Garg				$(QTI_PLAT_PATH)/qtiseclib/src/qtiseclib_cb_interface.c	\
75*6091f03dSSumit Garg				drivers/qti/crypto/rng.c
76*6091f03dSSumit Garg
77*6091f03dSSumit Garg
78*6091f03dSSumit GargPLAT_INCLUDES		:=	-Iinclude/plat/common/					\
79*6091f03dSSumit Garg
80*6091f03dSSumit GargPLAT_INCLUDES		+=	${QTI_EXTERNAL_INCLUDES}
81*6091f03dSSumit Garg
82*6091f03dSSumit Garginclude lib/xlat_tables_v2/xlat_tables.mk
83*6091f03dSSumit GargPLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}					\
84*6091f03dSSumit Garg				plat/common/aarch64/crash_console_helpers.S    \
85*6091f03dSSumit Garg				common/desc_image_load.c			\
86*6091f03dSSumit Garg				lib/bl_aux_params/bl_aux_params.c		\
87*6091f03dSSumit Garg
88*6091f03dSSumit Garginclude lib/coreboot/coreboot.mk
89*6091f03dSSumit Garg
90*6091f03dSSumit Garg#PSCI Sources.
91*6091f03dSSumit GargPSCI_SOURCES		:=	plat/common/plat_psci_common.c				\
92*6091f03dSSumit Garg
93*6091f03dSSumit Garg# GIC-600 configuration
94*6091f03dSSumit GargGICV3_SUPPORT_GIC600	:=	1
95*6091f03dSSumit Garg# Include GICv3 driver files
96*6091f03dSSumit Garginclude drivers/arm/gic/v3/gicv3.mk
97*6091f03dSSumit Garg
98*6091f03dSSumit Garg#Timer sources
99*6091f03dSSumit GargTIMER_SOURCES		:=	drivers/delay_timer/generic_delay_timer.c	\
100*6091f03dSSumit Garg				drivers/delay_timer/delay_timer.c		\
101*6091f03dSSumit Garg
102*6091f03dSSumit Garg#GIC sources.
103*6091f03dSSumit GargGIC_SOURCES		:=	plat/common/plat_gicv3.c			\
104*6091f03dSSumit Garg				${GICV3_SOURCES}				\
105*6091f03dSSumit Garg
106*6091f03dSSumit GargCPU_SOURCES		:=	lib/cpus/aarch64/cortex_a78.S			\
107*6091f03dSSumit Garg				lib/cpus/aarch64/cortex_a55.S			\
108*6091f03dSSumit Garg
109*6091f03dSSumit GargBL31_SOURCES		+=	${QTI_BL31_SOURCES}				\
110*6091f03dSSumit Garg				${PSCI_SOURCES}					\
111*6091f03dSSumit Garg				${GIC_SOURCES}					\
112*6091f03dSSumit Garg				${TIMER_SOURCES}				\
113*6091f03dSSumit Garg				${CPU_SOURCES}					\
114*6091f03dSSumit Garg
115*6091f03dSSumit Garg# Override this on the command line to point to the qtiseclib library which
116*6091f03dSSumit Garg# will be available in coreboot.org
117*6091f03dSSumit GargQTISECLIB_PATH ?=
118*6091f03dSSumit Garg
119*6091f03dSSumit Gargifeq ($(QTISECLIB_PATH),)
120*6091f03dSSumit Garg# if No lib then use stub implementation for qtiseclib interface
121*6091f03dSSumit Garg$(warning QTISECLIB_PATH is not provided while building, using stub implementation. \
122*6091f03dSSumit Garg		Please refer docs/plat/qti.rst for more details \
123*6091f03dSSumit Garg		THIS FIRMWARE WILL NOT BOOT!)
124*6091f03dSSumit GargBL31_SOURCES	+=	plat/qti/qtiseclib/src/qtiseclib_interface_stub.c
125*6091f03dSSumit Gargelse
126*6091f03dSSumit Garg# use library provided by QTISECLIB_PATH
127*6091f03dSSumit GargLDFLAGS += -L $(dir $(QTISECLIB_PATH))
128*6091f03dSSumit GargLDLIBS += -l$(patsubst lib%.a,%,$(notdir $(QTISECLIB_PATH)))
129*6091f03dSSumit Gargendif
130