xref: /rk3399_ARM-atf/plat/qti/kodiak/sc7280_chrome/inc/platform_def.h (revision 1c63cd61495542b0b52e1b6e484c59ce5c26e0d2)
1*6091f03dSSumit Garg /*
2*6091f03dSSumit Garg  * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
3*6091f03dSSumit Garg  * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
4*6091f03dSSumit Garg  * Copyright (c) 2025, Qualcomm Technologies, Inc. and/or its subsidiaries.
5*6091f03dSSumit Garg  *
6*6091f03dSSumit Garg  * SPDX-License-Identifier: BSD-3-Clause
7*6091f03dSSumit Garg  */
8*6091f03dSSumit Garg #ifndef PLATFORM_DEF_H
9*6091f03dSSumit Garg #define PLATFORM_DEF_H
10*6091f03dSSumit Garg 
11*6091f03dSSumit Garg #include <kodiak_def.h>
12*6091f03dSSumit Garg 
13*6091f03dSSumit Garg /*******************************************************************************
14*6091f03dSSumit Garg  * BL31 specific defines.
15*6091f03dSSumit Garg  ******************************************************************************/
16*6091f03dSSumit Garg /*
17*6091f03dSSumit Garg  * Put BL31 at DDR as per memory map. BL31_BASE is calculated using the
18*6091f03dSSumit Garg  * current BL31 debug size plus a little space for growth.
19*6091f03dSSumit Garg  */
20*6091f03dSSumit Garg #define BL31_BASE				0xC0000000
21*6091f03dSSumit Garg #define BL31_SIZE				0x00100000
22*6091f03dSSumit Garg #define BL31_LIMIT				(BL31_BASE + BL31_SIZE)
23*6091f03dSSumit Garg 
24*6091f03dSSumit Garg #endif /* PLATFORM_DEF_H */
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