xref: /rk3399_ARM-atf/plat/qti/common/src/qti_syscall.c (revision 4b918452bdb3f117c3ab735313e8a1b86e938440)
15bd9c17dSSaurabh Gorecha /*
25bd9c17dSSaurabh Gorecha  * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
35bd9c17dSSaurabh Gorecha  * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
45bd9c17dSSaurabh Gorecha  *
55bd9c17dSSaurabh Gorecha  * SPDX-License-Identifier: BSD-3-Clause
65bd9c17dSSaurabh Gorecha  */
75bd9c17dSSaurabh Gorecha #include <stdbool.h>
85bd9c17dSSaurabh Gorecha #include <stddef.h>
95bd9c17dSSaurabh Gorecha #include <stdint.h>
105bd9c17dSSaurabh Gorecha #include <string.h>
115bd9c17dSSaurabh Gorecha 
125bd9c17dSSaurabh Gorecha #include <common/debug.h>
135bd9c17dSSaurabh Gorecha #include <common/runtime_svc.h>
145bd9c17dSSaurabh Gorecha #include <context.h>
155bd9c17dSSaurabh Gorecha #include <lib/coreboot.h>
165bd9c17dSSaurabh Gorecha #include <lib/utils_def.h>
175bd9c17dSSaurabh Gorecha #include <lib/xlat_tables/xlat_tables_v2.h>
185bd9c17dSSaurabh Gorecha #include <smccc_helpers.h>
195bd9c17dSSaurabh Gorecha #include <tools_share/uuid.h>
205bd9c17dSSaurabh Gorecha 
215bd9c17dSSaurabh Gorecha #include <qti_plat.h>
225bd9c17dSSaurabh Gorecha #include <qti_secure_io_cfg.h>
235bd9c17dSSaurabh Gorecha #include <qtiseclib_interface.h>
245bd9c17dSSaurabh Gorecha /*
255bd9c17dSSaurabh Gorecha  * SIP service - SMC function IDs for SiP Service queries
265bd9c17dSSaurabh Gorecha  *
275bd9c17dSSaurabh Gorecha  */
285bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_CALL_COUNT_ID			U(0x0200ff00)
295bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_UID_ID				U(0x0200ff01)
305bd9c17dSSaurabh Gorecha /*							0x8200ff02 is reserved*/
315bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_VERSION_ID				U(0x0200ff03)
325bd9c17dSSaurabh Gorecha 
335bd9c17dSSaurabh Gorecha /*
345bd9c17dSSaurabh Gorecha  * Syscall's to allow Non Secure world accessing peripheral/IO memory
355bd9c17dSSaurabh Gorecha  * those are secure/proteced BUT not required to be secure.
365bd9c17dSSaurabh Gorecha  */
375bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_SECURE_IO_READ_ID		U(0x02000501)
385bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_SECURE_IO_WRITE_ID		U(0x02000502)
395bd9c17dSSaurabh Gorecha 
405bd9c17dSSaurabh Gorecha /*
415bd9c17dSSaurabh Gorecha  * Syscall's to assigns a list of intermediate PAs from a
425bd9c17dSSaurabh Gorecha  * source Virtual Machine (VM) to a destination VM.
435bd9c17dSSaurabh Gorecha  */
445bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_MEM_ASSIGN_ID		U(0x02000C16)
455bd9c17dSSaurabh Gorecha 
465bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_SECURE_IO_READ_PARAM_ID	U(0x1)
475bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_SECURE_IO_WRITE_PARAM_ID	U(0x2)
485bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_MEM_ASSIGN_PARAM_ID		U(0x1117)
495bd9c17dSSaurabh Gorecha 
505bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_CALL_COUNT			U(0x3)
515bd9c17dSSaurabh Gorecha #define QTI_SIP_SVC_VERSION_MAJOR		U(0x0)
525bd9c17dSSaurabh Gorecha #define	QTI_SIP_SVC_VERSION_MINOR		U(0x0)
535bd9c17dSSaurabh Gorecha 
545bd9c17dSSaurabh Gorecha #define QTI_VM_LAST				U(44)
555bd9c17dSSaurabh Gorecha #define SIZE4K					U(0x1000)
565bd9c17dSSaurabh Gorecha #define QTI_VM_MAX_LIST_SIZE			U(0x20)
575bd9c17dSSaurabh Gorecha 
585bd9c17dSSaurabh Gorecha #define	FUNCID_OEN_NUM_MASK	((FUNCID_OEN_MASK << FUNCID_OEN_SHIFT)\
595bd9c17dSSaurabh Gorecha 				|(FUNCID_NUM_MASK << FUNCID_NUM_SHIFT))
605bd9c17dSSaurabh Gorecha 
615bd9c17dSSaurabh Gorecha enum {
625bd9c17dSSaurabh Gorecha 	QTI_SIP_SUCCESS = 0,
635bd9c17dSSaurabh Gorecha 	QTI_SIP_NOT_SUPPORTED = -1,
645bd9c17dSSaurabh Gorecha 	QTI_SIP_PREEMPTED = -2,
655bd9c17dSSaurabh Gorecha 	QTI_SIP_INVALID_PARAM = -3,
665bd9c17dSSaurabh Gorecha };
675bd9c17dSSaurabh Gorecha 
685bd9c17dSSaurabh Gorecha /* QTI SiP Service UUID */
695bd9c17dSSaurabh Gorecha DEFINE_SVC_UUID2(qti_sip_svc_uid,
705bd9c17dSSaurabh Gorecha 		 0x43864748, 0x217f, 0x41ad, 0xaa, 0x5a,
715bd9c17dSSaurabh Gorecha 		 0xba, 0xe7, 0x0f, 0xa5, 0x52, 0xaf);
725bd9c17dSSaurabh Gorecha 
735bd9c17dSSaurabh Gorecha static bool qti_is_secure_io_access_allowed(u_register_t addr)
745bd9c17dSSaurabh Gorecha {
755bd9c17dSSaurabh Gorecha 	int i = 0;
765bd9c17dSSaurabh Gorecha 
775bd9c17dSSaurabh Gorecha 	for (i = 0; i < ARRAY_SIZE(qti_secure_io_allowed_regs); i++) {
785bd9c17dSSaurabh Gorecha 		if ((uintptr_t) addr == qti_secure_io_allowed_regs[i]) {
795bd9c17dSSaurabh Gorecha 			return true;
805bd9c17dSSaurabh Gorecha 		}
815bd9c17dSSaurabh Gorecha 	}
825bd9c17dSSaurabh Gorecha 
835bd9c17dSSaurabh Gorecha 	return false;
845bd9c17dSSaurabh Gorecha }
855bd9c17dSSaurabh Gorecha 
865bd9c17dSSaurabh Gorecha bool qti_mem_assign_validate_param(memprot_info_t *mem_info,
875bd9c17dSSaurabh Gorecha 				   u_register_t u_num_mappings,
885bd9c17dSSaurabh Gorecha 				   uint32_t *source_vm_list,
895bd9c17dSSaurabh Gorecha 				   u_register_t src_vm_list_cnt,
905bd9c17dSSaurabh Gorecha 				   memprot_dst_vm_perm_info_t *dest_vm_list,
915bd9c17dSSaurabh Gorecha 				   u_register_t dst_vm_list_cnt)
925bd9c17dSSaurabh Gorecha {
935bd9c17dSSaurabh Gorecha 	int i;
945bd9c17dSSaurabh Gorecha 
955bd9c17dSSaurabh Gorecha 	if (!source_vm_list || !dest_vm_list || !mem_info
965bd9c17dSSaurabh Gorecha 	    || (src_vm_list_cnt == 0)
975bd9c17dSSaurabh Gorecha 	    || (src_vm_list_cnt >= QTI_VM_LAST) || (dst_vm_list_cnt == 0)
985bd9c17dSSaurabh Gorecha 	    || (dst_vm_list_cnt >= QTI_VM_LAST) || (u_num_mappings == 0)
995bd9c17dSSaurabh Gorecha 	    || u_num_mappings > QTI_VM_MAX_LIST_SIZE) {
100*4b918452SSaurabh Gorecha 		ERROR("vm count is 0 or more then QTI_VM_LAST or empty list\n");
101*4b918452SSaurabh Gorecha 		ERROR("source_vm_list %p dest_vm_list %p mem_info %p src_vm_list_cnt %u dst_vm_list_cnt %u u_num_mappings %u\n",
102*4b918452SSaurabh Gorecha 		     source_vm_list, dest_vm_list, mem_info,
103*4b918452SSaurabh Gorecha 		     (unsigned int)src_vm_list_cnt,
104*4b918452SSaurabh Gorecha 		     (unsigned int)dst_vm_list_cnt,
105*4b918452SSaurabh Gorecha 		     (unsigned int)u_num_mappings);
1065bd9c17dSSaurabh Gorecha 		return false;
1075bd9c17dSSaurabh Gorecha 	}
1085bd9c17dSSaurabh Gorecha 	for (i = 0; i < u_num_mappings; i++) {
1095bd9c17dSSaurabh Gorecha 		if ((mem_info[i].mem_addr & (SIZE4K - 1))
110*4b918452SSaurabh Gorecha 		    || (mem_info[i].mem_size == 0)
1115bd9c17dSSaurabh Gorecha 		    || (mem_info[i].mem_size & (SIZE4K - 1))) {
112*4b918452SSaurabh Gorecha 			ERROR("mem_info passed buffer 0x%x or size 0x%x is not 4k aligned\n",
113*4b918452SSaurabh Gorecha 			     (unsigned int)mem_info[i].mem_addr,
114*4b918452SSaurabh Gorecha 			     (unsigned int)mem_info[i].mem_size);
1155bd9c17dSSaurabh Gorecha 			return false;
1165bd9c17dSSaurabh Gorecha 		}
1175bd9c17dSSaurabh Gorecha 
1185bd9c17dSSaurabh Gorecha 		if ((mem_info[i].mem_addr + mem_info[i].mem_size) <
1195bd9c17dSSaurabh Gorecha 		    mem_info[i].mem_addr) {
120*4b918452SSaurabh Gorecha 			ERROR("overflow in mem_addr 0x%x add mem_size 0x%x\n",
121*4b918452SSaurabh Gorecha 			      (unsigned int)mem_info[i].mem_addr,
122*4b918452SSaurabh Gorecha 			      (unsigned int)mem_info[i].mem_size);
1235bd9c17dSSaurabh Gorecha 			return false;
1245bd9c17dSSaurabh Gorecha 		}
125*4b918452SSaurabh Gorecha 		coreboot_memory_t mem_type = coreboot_get_memory_type(
126*4b918452SSaurabh Gorecha 						mem_info[i].mem_addr,
127*4b918452SSaurabh Gorecha 						mem_info[i].mem_size);
128*4b918452SSaurabh Gorecha 		if (mem_type != CB_MEM_RAM && mem_type != CB_MEM_RESERVED) {
129*4b918452SSaurabh Gorecha 			ERROR("memory region not in CB MEM RAM or RESERVED area: region start 0x%x size 0x%x\n",
130*4b918452SSaurabh Gorecha 			     (unsigned int)mem_info[i].mem_addr,
131*4b918452SSaurabh Gorecha 			     (unsigned int)mem_info[i].mem_size);
1325bd9c17dSSaurabh Gorecha 			return false;
1335bd9c17dSSaurabh Gorecha 		}
1345bd9c17dSSaurabh Gorecha 	}
1355bd9c17dSSaurabh Gorecha 	for (i = 0; i < src_vm_list_cnt; i++) {
1365bd9c17dSSaurabh Gorecha 		if (source_vm_list[i] >= QTI_VM_LAST) {
137*4b918452SSaurabh Gorecha 			ERROR("source_vm_list[%d] 0x%x is more then QTI_VM_LAST\n",
138*4b918452SSaurabh Gorecha 			      i, (unsigned int)source_vm_list[i]);
1395bd9c17dSSaurabh Gorecha 			return false;
1405bd9c17dSSaurabh Gorecha 		}
1415bd9c17dSSaurabh Gorecha 	}
1425bd9c17dSSaurabh Gorecha 	for (i = 0; i < dst_vm_list_cnt; i++) {
1435bd9c17dSSaurabh Gorecha 		if (dest_vm_list[i].dst_vm >= QTI_VM_LAST) {
144*4b918452SSaurabh Gorecha 			ERROR("dest_vm_list[%d] 0x%x is more then QTI_VM_LAST\n",
145*4b918452SSaurabh Gorecha 			      i, (unsigned int)dest_vm_list[i].dst_vm);
1465bd9c17dSSaurabh Gorecha 			return false;
1475bd9c17dSSaurabh Gorecha 		}
1485bd9c17dSSaurabh Gorecha 	}
1495bd9c17dSSaurabh Gorecha 	return true;
1505bd9c17dSSaurabh Gorecha }
1515bd9c17dSSaurabh Gorecha 
1525bd9c17dSSaurabh Gorecha static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
1535bd9c17dSSaurabh Gorecha 				    u_register_t x1,
1545bd9c17dSSaurabh Gorecha 				    u_register_t x2,
1555bd9c17dSSaurabh Gorecha 				    u_register_t x3, u_register_t x4)
1565bd9c17dSSaurabh Gorecha {
1575bd9c17dSSaurabh Gorecha 	uintptr_t dyn_map_start = 0, dyn_map_end = 0;
1585bd9c17dSSaurabh Gorecha 	size_t dyn_map_size = 0;
1595bd9c17dSSaurabh Gorecha 	u_register_t x6, x7;
1605bd9c17dSSaurabh Gorecha 	int ret = QTI_SIP_NOT_SUPPORTED;
1615bd9c17dSSaurabh Gorecha 	u_register_t x5 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X5);
1625bd9c17dSSaurabh Gorecha 
1635bd9c17dSSaurabh Gorecha 	if (smc_cc == SMC_32) {
1645bd9c17dSSaurabh Gorecha 		x5 = (uint32_t) x5;
1655bd9c17dSSaurabh Gorecha 	}
1665bd9c17dSSaurabh Gorecha 	/* Validate input arg count & retrieve arg3-6 from NS Buffer. */
1675bd9c17dSSaurabh Gorecha 	if ((x1 != QTI_SIP_SVC_MEM_ASSIGN_PARAM_ID) || (x5 == 0x0)) {
168*4b918452SSaurabh Gorecha 		ERROR("invalid mem_assign param id or no mapping info\n");
1695bd9c17dSSaurabh Gorecha 		goto unmap_return;
1705bd9c17dSSaurabh Gorecha 	}
1715bd9c17dSSaurabh Gorecha 
1725bd9c17dSSaurabh Gorecha 	/* Map NS Buffer. */
1735bd9c17dSSaurabh Gorecha 	dyn_map_start = x5;
1745bd9c17dSSaurabh Gorecha 	dyn_map_size =
1755bd9c17dSSaurabh Gorecha 		(smc_cc ==
1765bd9c17dSSaurabh Gorecha 		 SMC_32) ? (sizeof(uint32_t) * 4) : (sizeof(uint64_t) * 4);
1775bd9c17dSSaurabh Gorecha 	if (qti_mmap_add_dynamic_region(dyn_map_start, dyn_map_size,
1785bd9c17dSSaurabh Gorecha 				(MT_NS | MT_RO_DATA)) != 0) {
179*4b918452SSaurabh Gorecha 		ERROR("map failed for params NS Buffer %x %x\n",
180*4b918452SSaurabh Gorecha 		      (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
1815bd9c17dSSaurabh Gorecha 		goto unmap_return;
1825bd9c17dSSaurabh Gorecha 	}
1835bd9c17dSSaurabh Gorecha 	/* Retrieve indirect args. */
1845bd9c17dSSaurabh Gorecha 	if (smc_cc == SMC_32) {
1855bd9c17dSSaurabh Gorecha 		x6 = *((uint32_t *) x5 + 1);
1865bd9c17dSSaurabh Gorecha 		x7 = *((uint32_t *) x5 + 2);
1875bd9c17dSSaurabh Gorecha 		x5 = *(uint32_t *) x5;
1885bd9c17dSSaurabh Gorecha 	} else {
1895bd9c17dSSaurabh Gorecha 		x6 = *((uint64_t *) x5 + 1);
1905bd9c17dSSaurabh Gorecha 		x7 = *((uint64_t *) x5 + 2);
1915bd9c17dSSaurabh Gorecha 		x5 = *(uint64_t *) x5;
1925bd9c17dSSaurabh Gorecha 	}
1935bd9c17dSSaurabh Gorecha 	/* Un-Map NS Buffer. */
1945bd9c17dSSaurabh Gorecha 	if (qti_mmap_remove_dynamic_region(dyn_map_start, dyn_map_size) != 0) {
195*4b918452SSaurabh Gorecha 		ERROR("unmap failed for params NS Buffer %x %x\n",
196*4b918452SSaurabh Gorecha 		      (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
1975bd9c17dSSaurabh Gorecha 		goto unmap_return;
1985bd9c17dSSaurabh Gorecha 	}
1995bd9c17dSSaurabh Gorecha 
2005bd9c17dSSaurabh Gorecha 	/*
2015bd9c17dSSaurabh Gorecha 	 * Map NS Buffers.
2025bd9c17dSSaurabh Gorecha 	 * arg0,2,4 points to buffers & arg1,3,5 hold sizes.
2035bd9c17dSSaurabh Gorecha 	 * MAP api's fail to map if it's already mapped. Let's
2045bd9c17dSSaurabh Gorecha 	 * find lowest start & highest end address, then map once.
2055bd9c17dSSaurabh Gorecha 	 */
2065bd9c17dSSaurabh Gorecha 	dyn_map_start = MIN(x2, x4);
2075bd9c17dSSaurabh Gorecha 	dyn_map_start = MIN(dyn_map_start, x6);
2085bd9c17dSSaurabh Gorecha 	dyn_map_end = MAX((x2 + x3), (x4 + x5));
2095bd9c17dSSaurabh Gorecha 	dyn_map_end = MAX(dyn_map_end, (x6 + x7));
2105bd9c17dSSaurabh Gorecha 	dyn_map_size = dyn_map_end - dyn_map_start;
2115bd9c17dSSaurabh Gorecha 
2125bd9c17dSSaurabh Gorecha 	if (qti_mmap_add_dynamic_region(dyn_map_start, dyn_map_size,
2135bd9c17dSSaurabh Gorecha 					(MT_NS | MT_RO_DATA)) != 0) {
214*4b918452SSaurabh Gorecha 		ERROR("map failed for params NS Buffer2 %x %x\n",
215*4b918452SSaurabh Gorecha 		      (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
2165bd9c17dSSaurabh Gorecha 		goto unmap_return;
2175bd9c17dSSaurabh Gorecha 	}
2185bd9c17dSSaurabh Gorecha 	memprot_info_t *mem_info_p = (memprot_info_t *) x2;
2195bd9c17dSSaurabh Gorecha 	uint32_t u_num_mappings = x3 / sizeof(memprot_info_t);
2205bd9c17dSSaurabh Gorecha 	uint32_t *source_vm_list_p = (uint32_t *) x4;
2215bd9c17dSSaurabh Gorecha 	uint32_t src_vm_list_cnt = x5 / sizeof(uint32_t);
2225bd9c17dSSaurabh Gorecha 	memprot_dst_vm_perm_info_t *dest_vm_list_p =
2235bd9c17dSSaurabh Gorecha 		(memprot_dst_vm_perm_info_t *) x6;
2245bd9c17dSSaurabh Gorecha 	uint32_t dst_vm_list_cnt =
2255bd9c17dSSaurabh Gorecha 		x7 / sizeof(memprot_dst_vm_perm_info_t);
2265bd9c17dSSaurabh Gorecha 	if (qti_mem_assign_validate_param(mem_info_p, u_num_mappings,
2275bd9c17dSSaurabh Gorecha 				source_vm_list_p, src_vm_list_cnt,
2285bd9c17dSSaurabh Gorecha 				dest_vm_list_p,
2295bd9c17dSSaurabh Gorecha 				dst_vm_list_cnt) != true) {
230*4b918452SSaurabh Gorecha 		ERROR("Param validation failed\n");
2315bd9c17dSSaurabh Gorecha 		goto unmap_return;
2325bd9c17dSSaurabh Gorecha 	}
2335bd9c17dSSaurabh Gorecha 
2345bd9c17dSSaurabh Gorecha 	memprot_info_t mem_info[QTI_VM_MAX_LIST_SIZE];
2355bd9c17dSSaurabh Gorecha 	/* Populating the arguments */
2365bd9c17dSSaurabh Gorecha 	for (int i = 0; i < u_num_mappings; i++) {
2375bd9c17dSSaurabh Gorecha 		mem_info[i].mem_addr = mem_info_p[i].mem_addr;
2385bd9c17dSSaurabh Gorecha 		mem_info[i].mem_size = mem_info_p[i].mem_size;
2395bd9c17dSSaurabh Gorecha 	}
2405bd9c17dSSaurabh Gorecha 
2415bd9c17dSSaurabh Gorecha 	memprot_dst_vm_perm_info_t dest_vm_list[QTI_VM_LAST];
2425bd9c17dSSaurabh Gorecha 
2435bd9c17dSSaurabh Gorecha 	for (int i = 0; i < dst_vm_list_cnt; i++) {
2445bd9c17dSSaurabh Gorecha 		dest_vm_list[i].dst_vm = dest_vm_list_p[i].dst_vm;
245*4b918452SSaurabh Gorecha 		dest_vm_list[i].dst_vm_perm = dest_vm_list_p[i].dst_vm_perm;
2465bd9c17dSSaurabh Gorecha 		dest_vm_list[i].ctx = dest_vm_list_p[i].ctx;
2475bd9c17dSSaurabh Gorecha 		dest_vm_list[i].ctx_size = dest_vm_list_p[i].ctx_size;
2485bd9c17dSSaurabh Gorecha 	}
2495bd9c17dSSaurabh Gorecha 
2505bd9c17dSSaurabh Gorecha 	uint32_t source_vm_list[QTI_VM_LAST];
2515bd9c17dSSaurabh Gorecha 
2525bd9c17dSSaurabh Gorecha 	for (int i = 0; i < src_vm_list_cnt; i++) {
2535bd9c17dSSaurabh Gorecha 		source_vm_list[i] = source_vm_list_p[i];
2545bd9c17dSSaurabh Gorecha 	}
2555bd9c17dSSaurabh Gorecha 	/* Un-Map NS Buffers. */
2565bd9c17dSSaurabh Gorecha 	if (qti_mmap_remove_dynamic_region(dyn_map_start,
2575bd9c17dSSaurabh Gorecha 				dyn_map_size) != 0) {
258*4b918452SSaurabh Gorecha 		ERROR("unmap failed for params NS Buffer %x %x\n",
259*4b918452SSaurabh Gorecha 		      (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
2605bd9c17dSSaurabh Gorecha 		goto unmap_return;
2615bd9c17dSSaurabh Gorecha 	}
2625bd9c17dSSaurabh Gorecha 	/* Invoke API lib api. */
2635bd9c17dSSaurabh Gorecha 	ret = qtiseclib_mem_assign(mem_info, u_num_mappings,
2645bd9c17dSSaurabh Gorecha 			source_vm_list, src_vm_list_cnt,
2655bd9c17dSSaurabh Gorecha 			dest_vm_list, dst_vm_list_cnt);
2665bd9c17dSSaurabh Gorecha 
2675bd9c17dSSaurabh Gorecha 	if (ret == 0) {
2685bd9c17dSSaurabh Gorecha 		SMC_RET2(handle, QTI_SIP_SUCCESS, ret);
2695bd9c17dSSaurabh Gorecha 	}
2705bd9c17dSSaurabh Gorecha unmap_return:
2715bd9c17dSSaurabh Gorecha 	/* Un-Map NS Buffers if mapped */
2725bd9c17dSSaurabh Gorecha 	if (dyn_map_start && dyn_map_size) {
2735bd9c17dSSaurabh Gorecha 		qti_mmap_remove_dynamic_region(dyn_map_start, dyn_map_size);
2745bd9c17dSSaurabh Gorecha 	}
2755bd9c17dSSaurabh Gorecha 
2765bd9c17dSSaurabh Gorecha 	SMC_RET2(handle, QTI_SIP_INVALID_PARAM, ret);
2775bd9c17dSSaurabh Gorecha }
2785bd9c17dSSaurabh Gorecha 
2795bd9c17dSSaurabh Gorecha /*
2805bd9c17dSSaurabh Gorecha  * This function handles QTI specific syscalls. Currently only SiP calls are present.
2815bd9c17dSSaurabh Gorecha  * Both FAST & YIELD type call land here.
2825bd9c17dSSaurabh Gorecha  */
2835bd9c17dSSaurabh Gorecha static uintptr_t qti_sip_handler(uint32_t smc_fid,
2845bd9c17dSSaurabh Gorecha 				 u_register_t x1,
2855bd9c17dSSaurabh Gorecha 				 u_register_t x2,
2865bd9c17dSSaurabh Gorecha 				 u_register_t x3,
2875bd9c17dSSaurabh Gorecha 				 u_register_t x4,
2885bd9c17dSSaurabh Gorecha 				 void *cookie, void *handle, u_register_t flags)
2895bd9c17dSSaurabh Gorecha {
2905bd9c17dSSaurabh Gorecha 	uint32_t l_smc_fid = smc_fid & FUNCID_OEN_NUM_MASK;
2915bd9c17dSSaurabh Gorecha 
2925bd9c17dSSaurabh Gorecha 	if (GET_SMC_CC(smc_fid) == SMC_32) {
2935bd9c17dSSaurabh Gorecha 		x1 = (uint32_t) x1;
2945bd9c17dSSaurabh Gorecha 		x2 = (uint32_t) x2;
2955bd9c17dSSaurabh Gorecha 		x3 = (uint32_t) x3;
2965bd9c17dSSaurabh Gorecha 		x4 = (uint32_t) x4;
2975bd9c17dSSaurabh Gorecha 	}
2985bd9c17dSSaurabh Gorecha 
2995bd9c17dSSaurabh Gorecha 	switch (l_smc_fid) {
3005bd9c17dSSaurabh Gorecha 	case QTI_SIP_SVC_CALL_COUNT_ID:
3015bd9c17dSSaurabh Gorecha 		{
3025bd9c17dSSaurabh Gorecha 			SMC_RET1(handle, QTI_SIP_SVC_CALL_COUNT);
3035bd9c17dSSaurabh Gorecha 			break;
3045bd9c17dSSaurabh Gorecha 		}
3055bd9c17dSSaurabh Gorecha 	case QTI_SIP_SVC_UID_ID:
3065bd9c17dSSaurabh Gorecha 		{
3075bd9c17dSSaurabh Gorecha 			/* Return UID to the caller */
3085bd9c17dSSaurabh Gorecha 			SMC_UUID_RET(handle, qti_sip_svc_uid);
3095bd9c17dSSaurabh Gorecha 			break;
3105bd9c17dSSaurabh Gorecha 		}
3115bd9c17dSSaurabh Gorecha 	case QTI_SIP_SVC_VERSION_ID:
3125bd9c17dSSaurabh Gorecha 		{
3135bd9c17dSSaurabh Gorecha 			/* Return the version of current implementation */
3145bd9c17dSSaurabh Gorecha 			SMC_RET2(handle, QTI_SIP_SVC_VERSION_MAJOR,
3155bd9c17dSSaurabh Gorecha 				 QTI_SIP_SVC_VERSION_MINOR);
3165bd9c17dSSaurabh Gorecha 			break;
3175bd9c17dSSaurabh Gorecha 		}
3185bd9c17dSSaurabh Gorecha 	case QTI_SIP_SVC_SECURE_IO_READ_ID:
3195bd9c17dSSaurabh Gorecha 		{
3205bd9c17dSSaurabh Gorecha 			if ((x1 == QTI_SIP_SVC_SECURE_IO_READ_PARAM_ID) &&
3215bd9c17dSSaurabh Gorecha 			    qti_is_secure_io_access_allowed(x2)) {
3225bd9c17dSSaurabh Gorecha 				SMC_RET2(handle, QTI_SIP_SUCCESS,
3235bd9c17dSSaurabh Gorecha 					 *((volatile uint32_t *)x2));
3245bd9c17dSSaurabh Gorecha 			}
3255bd9c17dSSaurabh Gorecha 			SMC_RET1(handle, QTI_SIP_INVALID_PARAM);
3265bd9c17dSSaurabh Gorecha 			break;
3275bd9c17dSSaurabh Gorecha 		}
3285bd9c17dSSaurabh Gorecha 	case QTI_SIP_SVC_SECURE_IO_WRITE_ID:
3295bd9c17dSSaurabh Gorecha 		{
3305bd9c17dSSaurabh Gorecha 			if ((x1 == QTI_SIP_SVC_SECURE_IO_WRITE_PARAM_ID) &&
3315bd9c17dSSaurabh Gorecha 			    qti_is_secure_io_access_allowed(x2)) {
3325bd9c17dSSaurabh Gorecha 				*((volatile uint32_t *)x2) = x3;
3335bd9c17dSSaurabh Gorecha 				SMC_RET1(handle, QTI_SIP_SUCCESS);
3345bd9c17dSSaurabh Gorecha 			}
3355bd9c17dSSaurabh Gorecha 			SMC_RET1(handle, QTI_SIP_INVALID_PARAM);
3365bd9c17dSSaurabh Gorecha 			break;
3375bd9c17dSSaurabh Gorecha 		}
3385bd9c17dSSaurabh Gorecha 	case QTI_SIP_SVC_MEM_ASSIGN_ID:
3395bd9c17dSSaurabh Gorecha 		{
3405bd9c17dSSaurabh Gorecha 			return qti_sip_mem_assign(handle, GET_SMC_CC(smc_fid),
3415bd9c17dSSaurabh Gorecha 						  x1, x2, x3, x4);
3425bd9c17dSSaurabh Gorecha 			break;
3435bd9c17dSSaurabh Gorecha 		}
3445bd9c17dSSaurabh Gorecha 	default:
3455bd9c17dSSaurabh Gorecha 		{
3465bd9c17dSSaurabh Gorecha 			SMC_RET1(handle, QTI_SIP_NOT_SUPPORTED);
3475bd9c17dSSaurabh Gorecha 		}
3485bd9c17dSSaurabh Gorecha 	}
3495bd9c17dSSaurabh Gorecha 	return (uintptr_t) handle;
3505bd9c17dSSaurabh Gorecha }
3515bd9c17dSSaurabh Gorecha 
3525bd9c17dSSaurabh Gorecha /* Define a runtime service descriptor for both fast & yield SiP calls */
3535bd9c17dSSaurabh Gorecha DECLARE_RT_SVC(qti_sip_fast_svc, OEN_SIP_START,
3545bd9c17dSSaurabh Gorecha 	       OEN_SIP_END, SMC_TYPE_FAST, NULL, qti_sip_handler);
3555bd9c17dSSaurabh Gorecha 
3565bd9c17dSSaurabh Gorecha DECLARE_RT_SVC(qti_sip_yield_svc, OEN_SIP_START,
3575bd9c17dSSaurabh Gorecha 	       OEN_SIP_END, SMC_TYPE_YIELD, NULL, qti_sip_handler);
358