146ee50e0SSaurabh Gorecha/* 2*3fb52e41SRyan Everett * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved. 346ee50e0SSaurabh Gorecha * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 446ee50e0SSaurabh Gorecha * 546ee50e0SSaurabh Gorecha * SPDX-License-Identifier: BSD-3-Clause 646ee50e0SSaurabh Gorecha */ 746ee50e0SSaurabh Gorecha 846ee50e0SSaurabh Gorecha#include <arch.h> 946ee50e0SSaurabh Gorecha#include <asm_macros.S> 1046ee50e0SSaurabh Gorecha#include <cpu_macros.S> 1146ee50e0SSaurabh Gorecha 1246ee50e0SSaurabh Gorecha#include <plat_macros.S> 1346ee50e0SSaurabh Gorecha#include <qti_cpu.h> 1446ee50e0SSaurabh Gorecha 1546ee50e0SSaurabh Gorecha .p2align 3 1646ee50e0SSaurabh Gorecha 1746ee50e0SSaurabh Gorecha/* ------------------------------------------------- 1846ee50e0SSaurabh Gorecha * The CPU Ops reset function for Kryo-3 Silver 1946ee50e0SSaurabh Gorecha * ------------------------------------------------- 2046ee50e0SSaurabh Gorecha */ 2146ee50e0SSaurabh Gorechafunc qti_kryo6_silver_reset_func 2246ee50e0SSaurabh Gorecha mov x19, x30 2346ee50e0SSaurabh Gorecha 2446ee50e0SSaurabh Gorecha bl qtiseclib_kryo6_silver_reset_asm 256cc743cfSSaurabh Gorecha mov x30, x19 266cc743cfSSaurabh Gorecha b cortex_a55_reset_func 2746ee50e0SSaurabh Gorecha 2846ee50e0SSaurabh Gorechaendfunc qti_kryo6_silver_reset_func 2946ee50e0SSaurabh Gorecha 3046ee50e0SSaurabh Gorecha/* --------------------------------------------------------- 3146ee50e0SSaurabh Gorecha * The CPU Ops cluster power down function for Kryo-3 Silver 3246ee50e0SSaurabh Gorecha * --------------------------------------------------------- 3346ee50e0SSaurabh Gorecha */ 3446ee50e0SSaurabh Gorechafunc qti_kryo6_silver_cluster_pwr_dwn 3546ee50e0SSaurabh Gorecha ret 3646ee50e0SSaurabh Gorechaendfunc qti_kryo6_silver_cluster_pwr_dwn 3746ee50e0SSaurabh Gorecha 3846ee50e0SSaurabh Gorecha/* --------------------------------------------- 3946ee50e0SSaurabh Gorecha * This function provides kryo4_silver specific 4046ee50e0SSaurabh Gorecha * register information for crash reporting. 4146ee50e0SSaurabh Gorecha * It needs to return with x6 pointing to 4246ee50e0SSaurabh Gorecha * a list of register names in ASCII and 4346ee50e0SSaurabh Gorecha * x8 - x15 having values of registers to be 4446ee50e0SSaurabh Gorecha * reported. 4546ee50e0SSaurabh Gorecha * --------------------------------------------- 4646ee50e0SSaurabh Gorecha */ 4746ee50e0SSaurabh Gorecha.section .rodata.qti_kryo4_silver_regs, "aS" 4846ee50e0SSaurabh Gorechaqti_kryo6_silver_regs: /* The ASCII list of register names to be reported */ 4946ee50e0SSaurabh Gorecha .asciz "" 5046ee50e0SSaurabh Gorecha 5146ee50e0SSaurabh Gorechafunc qti_kryo6_silver_cpu_reg_dump 5246ee50e0SSaurabh Gorecha adr x6, qti_kryo6_silver_regs 5346ee50e0SSaurabh Gorecha ret 5446ee50e0SSaurabh Gorechaendfunc qti_kryo6_silver_cpu_reg_dump 5546ee50e0SSaurabh Gorecha 5646ee50e0SSaurabh Gorecha 5746ee50e0SSaurabh Gorechadeclare_cpu_ops qti_kryo6_silver, QTI_KRYO6_SILVER_MIDR, \ 5846ee50e0SSaurabh Gorecha qti_kryo6_silver_reset_func, \ 596cc743cfSSaurabh Gorecha cortex_a55_core_pwr_dwn, \ 6046ee50e0SSaurabh Gorecha qti_kryo6_silver_cluster_pwr_dwn 61