xref: /rk3399_ARM-atf/plat/qti/common/src/aarch64/qti_kryo4_gold.S (revision ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b)
1/*
2 * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#include <arch.h>
9#include <asm_macros.S>
10#include <cpu_macros.S>
11
12#include <plat_macros.S>
13#include <qti_cpu.h>
14
15	.p2align 3
16
17/* -------------------------------------------------
18 * The CPU Ops reset function for Kryo-3 Gold
19 * -------------------------------------------------
20 */
21func qti_kryo4_gold_reset_func
22#if IMAGE_BL31 && WORKAROUND_CVE_2017_5715
23	adr	x0, wa_cve_2017_5715_bpiall_vbar
24	msr	vbar_el3, x0
25	isb
26#endif
27
28	mov	x19, x30
29
30	bl	qtiseclib_kryo4_gold_reset_asm
31	mov	x30, x19
32	b	cortex_a76_reset_func
33
34endfunc qti_kryo4_gold_reset_func
35
36/* -------------------------------------------------------
37 * The CPU Ops cluster power down function for Kryo-3 Gold
38 * -------------------------------------------------------
39 */
40func qti_kryo4_gold_cluster_pwr_dwn
41	ret
42endfunc qti_kryo4_gold_cluster_pwr_dwn
43
44/* ---------------------------------------------
45 * This function provides kryo4_gold specific
46 * register information for crash reporting.
47 * It needs to return with x6 pointing to
48 * a list of register names in ASCII and
49 * x8 - x15 having values of registers to be
50 * reported.
51 * ---------------------------------------------
52 */
53.section .rodata.qti_kryo4_gold_regs, "aS"
54qti_kryo4_gold_regs:  /* The ASCII list of register names to be reported */
55	.asciz	""
56
57func qti_kryo4_gold_cpu_reg_dump
58	adr	x6, qti_kryo4_gold_regs
59	ret
60endfunc qti_kryo4_gold_cpu_reg_dump
61
62declare_cpu_ops_wa	qti_kryo4_gold, QTI_KRYO4_GOLD_MIDR,	\
63		qti_kryo4_gold_reset_func,		\
64		CPU_NO_EXTRA1_FUNC,		\
65		cortex_a76_disable_wa_cve_2018_3639,	\
66		cortex_a76_core_pwr_dwn,	\
67		qti_kryo4_gold_cluster_pwr_dwn
68