xref: /rk3399_ARM-atf/plat/qti/common/src/aarch64/qti_kryo4_gold.S (revision a6e01071f0f09fedceb4df242cd93d0dc90d7327)
15bd9c17dSSaurabh Gorecha/*
23fb52e41SRyan Everett * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
35bd9c17dSSaurabh Gorecha * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
45bd9c17dSSaurabh Gorecha *
55bd9c17dSSaurabh Gorecha * SPDX-License-Identifier: BSD-3-Clause
65bd9c17dSSaurabh Gorecha */
75bd9c17dSSaurabh Gorecha
85bd9c17dSSaurabh Gorecha#include <arch.h>
95bd9c17dSSaurabh Gorecha#include <asm_macros.S>
105bd9c17dSSaurabh Gorecha#include <cpu_macros.S>
115bd9c17dSSaurabh Gorecha
125bd9c17dSSaurabh Gorecha#include <plat_macros.S>
135bd9c17dSSaurabh Gorecha#include <qti_cpu.h>
145bd9c17dSSaurabh Gorecha
155bd9c17dSSaurabh Gorecha	.p2align 3
165bd9c17dSSaurabh Gorecha
175bd9c17dSSaurabh Gorecha/* -------------------------------------------------
185bd9c17dSSaurabh Gorecha * The CPU Ops reset function for Kryo-3 Gold
195bd9c17dSSaurabh Gorecha * -------------------------------------------------
205bd9c17dSSaurabh Gorecha */
215bd9c17dSSaurabh Gorechafunc qti_kryo4_gold_reset_func
225bd9c17dSSaurabh Gorecha#if IMAGE_BL31 && WORKAROUND_CVE_2017_5715
235bd9c17dSSaurabh Gorecha	adr	x0, wa_cve_2017_5715_bpiall_vbar
245bd9c17dSSaurabh Gorecha	msr	vbar_el3, x0
255bd9c17dSSaurabh Gorecha	isb
265bd9c17dSSaurabh Gorecha#endif
275bd9c17dSSaurabh Gorecha
285bd9c17dSSaurabh Gorecha	mov	x19, x30
295bd9c17dSSaurabh Gorecha
305bd9c17dSSaurabh Gorecha	bl	qtiseclib_kryo4_gold_reset_asm
316cc743cfSSaurabh Gorecha	mov	x30, x19
326cc743cfSSaurabh Gorecha	b	cortex_a76_reset_func
335bd9c17dSSaurabh Gorecha
345bd9c17dSSaurabh Gorechaendfunc qti_kryo4_gold_reset_func
355bd9c17dSSaurabh Gorecha
365bd9c17dSSaurabh Gorecha/* -------------------------------------------------------
375bd9c17dSSaurabh Gorecha * The CPU Ops cluster power down function for Kryo-3 Gold
385bd9c17dSSaurabh Gorecha * -------------------------------------------------------
395bd9c17dSSaurabh Gorecha */
405bd9c17dSSaurabh Gorechafunc qti_kryo4_gold_cluster_pwr_dwn
415bd9c17dSSaurabh Gorecha	ret
425bd9c17dSSaurabh Gorechaendfunc qti_kryo4_gold_cluster_pwr_dwn
435bd9c17dSSaurabh Gorecha
445bd9c17dSSaurabh Gorecha/* ---------------------------------------------
455bd9c17dSSaurabh Gorecha * This function provides kryo4_gold specific
465bd9c17dSSaurabh Gorecha * register information for crash reporting.
475bd9c17dSSaurabh Gorecha * It needs to return with x6 pointing to
485bd9c17dSSaurabh Gorecha * a list of register names in ASCII and
495bd9c17dSSaurabh Gorecha * x8 - x15 having values of registers to be
505bd9c17dSSaurabh Gorecha * reported.
515bd9c17dSSaurabh Gorecha * ---------------------------------------------
525bd9c17dSSaurabh Gorecha */
535bd9c17dSSaurabh Gorecha.section .rodata.qti_kryo4_gold_regs, "aS"
545bd9c17dSSaurabh Gorechaqti_kryo4_gold_regs:  /* The ASCII list of register names to be reported */
555bd9c17dSSaurabh Gorecha	.asciz	""
565bd9c17dSSaurabh Gorecha
575bd9c17dSSaurabh Gorechafunc qti_kryo4_gold_cpu_reg_dump
585bd9c17dSSaurabh Gorecha	adr	x6, qti_kryo4_gold_regs
595bd9c17dSSaurabh Gorecha	ret
605bd9c17dSSaurabh Gorechaendfunc qti_kryo4_gold_cpu_reg_dump
615bd9c17dSSaurabh Gorecha
62*fd04156eSArvind Ram Prakashdeclare_cpu_ops	qti_kryo4_gold, QTI_KRYO4_GOLD_MIDR,	\
635bd9c17dSSaurabh Gorecha		qti_kryo4_gold_reset_func,		\
646cc743cfSSaurabh Gorecha		cortex_a76_core_pwr_dwn,	\
655bd9c17dSSaurabh Gorecha		qti_kryo4_gold_cluster_pwr_dwn
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