xref: /rk3399_ARM-atf/plat/qti/common/inc/qti_board_def.h (revision 4b918452bdb3f117c3ab735313e8a1b86e938440)
15bd9c17dSSaurabh Gorecha /*
25bd9c17dSSaurabh Gorecha  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
35bd9c17dSSaurabh Gorecha  * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
45bd9c17dSSaurabh Gorecha  *
55bd9c17dSSaurabh Gorecha  * SPDX-License-Identifier: BSD-3-Clause
65bd9c17dSSaurabh Gorecha  */
75bd9c17dSSaurabh Gorecha #ifndef QTI_BOARD_DEF_H
85bd9c17dSSaurabh Gorecha #define QTI_BOARD_DEF_H
95bd9c17dSSaurabh Gorecha 
105bd9c17dSSaurabh Gorecha /*
115bd9c17dSSaurabh Gorecha  * Required platform porting definitions common to all ARM
125bd9c17dSSaurabh Gorecha  * development platforms
135bd9c17dSSaurabh Gorecha  */
145bd9c17dSSaurabh Gorecha 
15*4b918452SSaurabh Gorecha /*
16*4b918452SSaurabh Gorecha  * Defines used to retrieve QTI SOC Version
17*4b918452SSaurabh Gorecha  */
18*4b918452SSaurabh Gorecha #define JEDEC_QTI_BKID	U(0x0)
19*4b918452SSaurabh Gorecha #define JEDEC_QTI_MFID	U(0x70)
20*4b918452SSaurabh Gorecha #define QTI_SOC_CONTINUATION_SHIFT	U(24)
21*4b918452SSaurabh Gorecha #define QTI_SOC_IDENTIFICATION_SHIFT	U(16)
22*4b918452SSaurabh Gorecha 
235bd9c17dSSaurabh Gorecha /* Size of cacheable stacks */
245bd9c17dSSaurabh Gorecha #define PLATFORM_STACK_SIZE	0x1000
255bd9c17dSSaurabh Gorecha 
265bd9c17dSSaurabh Gorecha /*
275bd9c17dSSaurabh Gorecha  * PLAT_QTI_MMAP_ENTRIES depends on the number of entries in the
285bd9c17dSSaurabh Gorecha  * plat_qti_mmap array defined for each BL stage.
295bd9c17dSSaurabh Gorecha  */
305bd9c17dSSaurabh Gorecha #define PLAT_QTI_MMAP_ENTRIES	12
315bd9c17dSSaurabh Gorecha 
325bd9c17dSSaurabh Gorecha /*
335bd9c17dSSaurabh Gorecha  * Platform specific page table and MMU setup constants
345bd9c17dSSaurabh Gorecha  */
355bd9c17dSSaurabh Gorecha #define MAX_XLAT_TABLES		12
365bd9c17dSSaurabh Gorecha 
375bd9c17dSSaurabh Gorecha #endif /* QTI_BOARD_DEF_H */
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