xref: /rk3399_ARM-atf/plat/qemu/qemu_sbsa/sbsa_topology.c (revision 43d97fae9aa884c53c2dc1ddd213a58b2da7fc72)
1*5565ede4SGraeme Gregory /*
2*5565ede4SGraeme Gregory  * Copyright (c) 2020, Nuvia Inc
3*5565ede4SGraeme Gregory  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
4*5565ede4SGraeme Gregory  *
5*5565ede4SGraeme Gregory  * SPDX-License-Identifier: BSD-3-Clause
6*5565ede4SGraeme Gregory  */
7*5565ede4SGraeme Gregory 
8*5565ede4SGraeme Gregory #include <arch.h>
9*5565ede4SGraeme Gregory #include <common/debug.h>
10*5565ede4SGraeme Gregory 
11*5565ede4SGraeme Gregory #include <platform_def.h>
12*5565ede4SGraeme Gregory #include "sbsa_private.h"
13*5565ede4SGraeme Gregory 
14*5565ede4SGraeme Gregory /* The power domain tree descriptor */
15*5565ede4SGraeme Gregory static unsigned char power_domain_tree_desc[PLATFORM_CLUSTER_COUNT + 1];
16*5565ede4SGraeme Gregory 
17*5565ede4SGraeme Gregory /*******************************************************************************
18*5565ede4SGraeme Gregory  * This function returns the sbsa-ref default topology tree information.
19*5565ede4SGraeme Gregory  ******************************************************************************/
plat_get_power_domain_tree_desc(void)20*5565ede4SGraeme Gregory const unsigned char *plat_get_power_domain_tree_desc(void)
21*5565ede4SGraeme Gregory {
22*5565ede4SGraeme Gregory 	unsigned int i;
23*5565ede4SGraeme Gregory 
24*5565ede4SGraeme Gregory 	power_domain_tree_desc[0] = PLATFORM_CLUSTER_COUNT;
25*5565ede4SGraeme Gregory 
26*5565ede4SGraeme Gregory 	for (i = 0U; i < PLATFORM_CLUSTER_COUNT; i++) {
27*5565ede4SGraeme Gregory 		power_domain_tree_desc[i + 1] = PLATFORM_MAX_CPUS_PER_CLUSTER;
28*5565ede4SGraeme Gregory 	}
29*5565ede4SGraeme Gregory 
30*5565ede4SGraeme Gregory 	return power_domain_tree_desc;
31*5565ede4SGraeme Gregory }
32*5565ede4SGraeme Gregory 
33*5565ede4SGraeme Gregory /*******************************************************************************
34*5565ede4SGraeme Gregory  * This function implements a part of the critical interface between the psci
35*5565ede4SGraeme Gregory  * generic layer and the platform that allows the former to query the platform
36*5565ede4SGraeme Gregory  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
37*5565ede4SGraeme Gregory  * in case the MPIDR is invalid.
38*5565ede4SGraeme Gregory  ******************************************************************************/
plat_core_pos_by_mpidr(u_register_t mpidr)39*5565ede4SGraeme Gregory int plat_core_pos_by_mpidr(u_register_t mpidr)
40*5565ede4SGraeme Gregory {
41*5565ede4SGraeme Gregory 	unsigned int cluster_id, cpu_id;
42*5565ede4SGraeme Gregory 
43*5565ede4SGraeme Gregory 	mpidr &= MPIDR_AFFINITY_MASK;
44*5565ede4SGraeme Gregory 	if ((mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0U) {
45*5565ede4SGraeme Gregory 		ERROR("Invalid MPIDR\n");
46*5565ede4SGraeme Gregory 		return -1;
47*5565ede4SGraeme Gregory 	}
48*5565ede4SGraeme Gregory 
49*5565ede4SGraeme Gregory 	cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
50*5565ede4SGraeme Gregory 	cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
51*5565ede4SGraeme Gregory 
52*5565ede4SGraeme Gregory 	if (cluster_id >= PLATFORM_CLUSTER_COUNT) {
53*5565ede4SGraeme Gregory 		ERROR("cluster_id >= PLATFORM_CLUSTER_COUNT define\n");
54*5565ede4SGraeme Gregory 		return -1;
55*5565ede4SGraeme Gregory 	}
56*5565ede4SGraeme Gregory 
57*5565ede4SGraeme Gregory 	if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) {
58*5565ede4SGraeme Gregory 		ERROR("cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER define\n");
59*5565ede4SGraeme Gregory 		return -1;
60*5565ede4SGraeme Gregory 	}
61*5565ede4SGraeme Gregory 
62*5565ede4SGraeme Gregory 	return plat_qemu_calc_core_pos(mpidr);
63*5565ede4SGraeme Gregory }
64