1# 2# Copyright (c) 2019, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7CRASH_REPORTING := 1 8 9include lib/libfdt/libfdt.mk 10 11# Enable new version of image loading on QEMU platforms 12LOAD_IMAGE_V2 := 1 13 14ifeq ($(NEED_BL32),yes) 15$(eval $(call add_define,QEMU_LOAD_BL32)) 16endif 17 18PLAT_QEMU_PATH := plat/qemu/qemu_sbsa 19PLAT_QEMU_COMMON_PATH := plat/qemu/common 20PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 21 -I${PLAT_QEMU_COMMON_PATH}/include \ 22 -I${PLAT_QEMU_PATH}/include \ 23 -Iinclude/common/tbbr 24 25PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 26 27PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 28 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 29 drivers/arm/pl011/${ARCH}/pl011_console.S 30 31include lib/xlat_tables_v2/xlat_tables.mk 32PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 33 34BL1_SOURCES += drivers/io/io_semihosting.c \ 35 drivers/io/io_storage.c \ 36 drivers/io/io_fip.c \ 37 drivers/io/io_memmap.c \ 38 lib/semihosting/semihosting.c \ 39 lib/semihosting/${ARCH}/semihosting_call.S \ 40 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 41 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 42 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c 43 44BL1_SOURCES += lib/cpus/aarch64/aem_generic.S \ 45 lib/cpus/aarch64/cortex_a53.S \ 46 lib/cpus/aarch64/cortex_a57.S 47 48BL2_SOURCES += drivers/io/io_semihosting.c \ 49 drivers/io/io_storage.c \ 50 drivers/io/io_fip.c \ 51 drivers/io/io_memmap.c \ 52 lib/semihosting/semihosting.c \ 53 lib/semihosting/${ARCH}/semihosting_call.S \ 54 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 55 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 56 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 57 common/fdt_fixup.c \ 58 $(LIBFDT_SRCS) 59ifeq (${LOAD_IMAGE_V2},1) 60BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 61 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 62 common/desc_image_load.c 63endif 64 65QEMU_GIC_SOURCES := drivers/arm/gic/v3/gicv3_helpers.c \ 66 drivers/arm/gic/v3/gicv3_main.c \ 67 drivers/arm/gic/common/gic_common.c \ 68 plat/common/plat_gicv3.c \ 69 ${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c 70 71BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \ 72 lib/cpus/aarch64/cortex_a53.S \ 73 lib/cpus/aarch64/cortex_a57.S \ 74 lib/semihosting/semihosting.c \ 75 lib/semihosting/${ARCH}/semihosting_call.S \ 76 plat/common/plat_psci_common.c \ 77 ${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \ 78 ${PLAT_QEMU_COMMON_PATH}/topology.c \ 79 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 80 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 81 ${QEMU_GIC_SOURCES} 82 83SEPARATE_CODE_AND_RODATA := 1 84ENABLE_STACK_PROTECTOR := 0 85ifneq ($(ENABLE_STACK_PROTECTOR), 0) 86 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 87endif 88 89MULTI_CONSOLE_API := 1 90 91# Disable the PSCI platform compatibility layer 92ENABLE_PLAT_COMPAT := 0 93 94# Use known base for UEFI if not given from command line 95# By default BL33 is at FLASH1 base 96PRELOADED_BL33_BASE ?= 0x10000000 97 98# Qemu SBSA plafrom only support SEC_SRAM 99BL32_RAM_LOCATION_ID = SEC_SRAM_ID 100$(eval $(call add_define,BL32_RAM_LOCATION_ID)) 101 102# Don't have the Linux kernel as a BL33 image by default 103ARM_LINUX_KERNEL_AS_BL33 := 0 104$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 105$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 106 107ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE 108$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 109 110# Do not enable SVE 111ENABLE_SVE_FOR_NS := 0 112