1# 2# Copyright (c) 2019-2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9CRASH_REPORTING := 1 10 11include lib/libfdt/libfdt.mk 12 13ifeq (${SPM_MM},1) 14NEED_BL32 := yes 15EL3_EXCEPTION_HANDLING := 1 16GICV2_G0_FOR_EL3 := 1 17endif 18 19# Enable new version of image loading on QEMU platforms 20LOAD_IMAGE_V2 := 1 21 22CTX_INCLUDE_AARCH32_REGS := 0 23ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 24$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 25endif 26 27ifeq ($(NEED_BL32),yes) 28$(eval $(call add_define,QEMU_LOAD_BL32)) 29endif 30 31PLAT_QEMU_PATH := plat/qemu/qemu_sbsa 32PLAT_QEMU_COMMON_PATH := plat/qemu/common 33PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 34 -I${PLAT_QEMU_COMMON_PATH}/include \ 35 -I${PLAT_QEMU_PATH}/include \ 36 -Iinclude/common/tbbr 37 38PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 39 40PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 41 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 42 drivers/arm/pl011/${ARCH}/pl011_console.S 43 44# Treating this as a memory-constrained port for now 45USE_COHERENT_MEM := 0 46 47# This can be overridden depending on CPU(s) used in the QEMU image 48HW_ASSISTED_COHERENCY := 1 49 50QEMU_CPU_LIBS := lib/cpus/aarch64/cortex_a57.S \ 51 lib/cpus/aarch64/cortex_a72.S \ 52 lib/cpus/aarch64/neoverse_n_common.S \ 53 lib/cpus/aarch64/neoverse_n1.S \ 54 lib/cpus/aarch64/neoverse_v1.S \ 55 lib/cpus/aarch64/qemu_max.S 56 57include lib/xlat_tables_v2/xlat_tables.mk 58PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 59 60BL1_SOURCES += drivers/io/io_semihosting.c \ 61 drivers/io/io_storage.c \ 62 drivers/io/io_fip.c \ 63 drivers/io/io_memmap.c \ 64 lib/semihosting/semihosting.c \ 65 lib/semihosting/${ARCH}/semihosting_call.S \ 66 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 67 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 68 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c 69 70BL1_SOURCES += ${QEMU_CPU_LIBS} 71 72BL2_SOURCES += drivers/io/io_semihosting.c \ 73 drivers/io/io_storage.c \ 74 drivers/io/io_fip.c \ 75 drivers/io/io_memmap.c \ 76 lib/semihosting/semihosting.c \ 77 lib/semihosting/${ARCH}/semihosting_call.S \ 78 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 79 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 80 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 81 common/fdt_fixup.c \ 82 $(LIBFDT_SRCS) 83ifeq (${LOAD_IMAGE_V2},1) 84BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 85 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 86 common/desc_image_load.c 87endif 88 89# Include GICv3 driver files 90include drivers/arm/gic/v3/gicv3.mk 91 92QEMU_GIC_SOURCES := ${GICV3_SOURCES} \ 93 plat/common/plat_gicv3.c 94 95BL31_SOURCES += ${QEMU_CPU_LIBS} \ 96 lib/semihosting/semihosting.c \ 97 lib/semihosting/${ARCH}/semihosting_call.S \ 98 plat/common/plat_psci_common.c \ 99 ${PLAT_QEMU_PATH}/sbsa_gic.c \ 100 ${PLAT_QEMU_PATH}/sbsa_pm.c \ 101 ${PLAT_QEMU_PATH}/sbsa_sip_svc.c \ 102 ${PLAT_QEMU_PATH}/sbsa_topology.c \ 103 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 104 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 105 common/fdt_fixup.c \ 106 ${QEMU_GIC_SOURCES} 107 108BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 109 110ifeq (${SPM_MM},1) 111 BL31_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_spm.c 112endif 113 114SEPARATE_CODE_AND_RODATA := 1 115ENABLE_STACK_PROTECTOR := 0 116ifneq ($(ENABLE_STACK_PROTECTOR), 0) 117 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 118endif 119 120MULTI_CONSOLE_API := 1 121 122# Disable the PSCI platform compatibility layer 123ENABLE_PLAT_COMPAT := 0 124 125# Use known base for UEFI if not given from command line 126# By default BL33 is at FLASH1 base 127PRELOADED_BL33_BASE ?= 0x10000000 128 129# Qemu SBSA plafrom only support SEC_SRAM 130BL32_RAM_LOCATION_ID = SEC_SRAM_ID 131$(eval $(call add_define,BL32_RAM_LOCATION_ID)) 132 133# Don't have the Linux kernel as a BL33 image by default 134ARM_LINUX_KERNEL_AS_BL33 := 0 135$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 136$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 137 138ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE 139$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 140 141# Later QEMU versions support SME and SVE. 142ENABLE_SVE_FOR_NS := 2 143ENABLE_SME_FOR_NS := 2 144 145# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max 146ENABLE_FEAT_FGT := 2 147