xref: /rk3399_ARM-atf/plat/qemu/qemu/platform.mk (revision 530ceda57288aa931d0c8ba7b3066340d587cc9b)
1#
2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Use the GICv2 driver on QEMU by default
8QEMU_USE_GIC_DRIVER	:= QEMU_GICV2
9
10ifeq (${ARM_ARCH_MAJOR},7)
11# ARMv7 Qemu support in trusted firmware expects the Cortex-A15 model.
12# Qemu Cortex-A15 model does not implement the virtualization extension.
13# For this reason, we cannot set ARM_CORTEX_A15=yes and must define all
14# the ARMv7 build directives.
15MARCH32_DIRECTIVE 	:= 	-mcpu=cortex-a15
16$(eval $(call add_define,ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING))
17$(eval $(call add_define,ARMV7_SUPPORTS_GENERIC_TIMER))
18# Qemu expects a BL32 boot stage.
19NEED_BL32		:=	yes
20endif # ARMv7
21
22ifeq (${SPD},opteed)
23add-lib-optee 		:= 	yes
24endif
25ifeq ($(AARCH32_SP),optee)
26add-lib-optee 		:= 	yes
27endif
28
29include lib/libfdt/libfdt.mk
30
31ifeq ($(NEED_BL32),yes)
32$(eval $(call add_define,QEMU_LOAD_BL32))
33endif
34
35PLAT_QEMU_PATH               :=      plat/qemu/qemu
36PLAT_QEMU_COMMON_PATH        :=      plat/qemu/common
37PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/		\
38				-I${PLAT_QEMU_COMMON_PATH}/include			\
39				-I${PLAT_QEMU_PATH}/include			\
40				-Iinclude/common/tbbr
41
42ifeq (${ARM_ARCH_MAJOR},8)
43PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/${ARCH}
44endif
45
46PLAT_BL_COMMON_SOURCES	:=	${PLAT_QEMU_COMMON_PATH}/qemu_common.c			\
47				${PLAT_QEMU_COMMON_PATH}/qemu_console.c		  \
48				drivers/arm/pl011/${ARCH}/pl011_console.S
49
50include lib/xlat_tables_v2/xlat_tables.mk
51PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
52
53ifneq (${TRUSTED_BOARD_BOOT},0)
54
55    include drivers/auth/mbedtls/mbedtls_crypto.mk
56    include drivers/auth/mbedtls/mbedtls_x509.mk
57
58    AUTH_SOURCES	:=	drivers/auth/auth_mod.c			\
59				drivers/auth/crypto_mod.c		\
60				drivers/auth/img_parser_mod.c		\
61				drivers/auth/tbbr/tbbr_cot.c
62
63    BL1_SOURCES		+=	${AUTH_SOURCES}				\
64				bl1/tbbr/tbbr_img_desc.c		\
65				plat/common/tbbr/plat_tbbr.c		\
66				${PLAT_QEMU_COMMON_PATH}/qemu_trusted_boot.c	     	\
67				$(PLAT_QEMU_COMMON_PATH)/qemu_rotpk.S
68
69    BL2_SOURCES		+=	${AUTH_SOURCES}				\
70				plat/common/tbbr/plat_tbbr.c		\
71				${PLAT_QEMU_COMMON_PATH}/qemu_trusted_boot.c	     	\
72				$(PLAT_QEMU_COMMON_PATH)/qemu_rotpk.S
73
74    ROT_KEY             = $(BUILD_PLAT)/rot_key.pem
75    ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
76
77    $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
78
79    $(BUILD_PLAT)/bl1/qemu_rotpk.o: $(ROTPK_HASH)
80    $(BUILD_PLAT)/bl2/qemu_rotpk.o: $(ROTPK_HASH)
81
82    certificates: $(ROT_KEY)
83
84    $(ROT_KEY):
85	@echo "  OPENSSL $@"
86	$(Q)openssl genrsa 2048 > $@ 2>/dev/null
87
88    $(ROTPK_HASH): $(ROT_KEY)
89	@echo "  OPENSSL $@"
90	$(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
91	openssl dgst -sha256 -binary > $@ 2>/dev/null
92endif
93
94BL1_SOURCES		+=	drivers/io/io_semihosting.c		\
95				drivers/io/io_storage.c			\
96				drivers/io/io_fip.c			\
97				drivers/io/io_memmap.c			\
98				lib/semihosting/semihosting.c		\
99				lib/semihosting/${ARCH}/semihosting_call.S \
100				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c		\
101				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S	\
102				${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
103
104ifeq (${ARM_ARCH_MAJOR},8)
105BL1_SOURCES		+=	lib/cpus/aarch64/aem_generic.S		\
106				lib/cpus/aarch64/cortex_a53.S		\
107				lib/cpus/aarch64/cortex_a57.S
108else
109BL1_SOURCES		+=	lib/cpus/${ARCH}/cortex_a15.S
110endif
111
112BL2_SOURCES		+=	drivers/io/io_semihosting.c		\
113				drivers/io/io_storage.c			\
114				drivers/io/io_fip.c			\
115				drivers/io/io_memmap.c			\
116				lib/semihosting/semihosting.c		\
117				lib/semihosting/${ARCH}/semihosting_call.S		\
118				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c		\
119				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S		\
120				${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c		\
121				${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c	\
122				${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c		\
123				common/fdt_fixup.c					\
124				common/desc_image_load.c
125
126ifeq ($(add-lib-optee),yes)
127BL2_SOURCES		+=	lib/optee/optee_utils.c
128endif
129
130QEMU_GICV2_SOURCES	:=	drivers/arm/gic/v2/gicv2_helpers.c	\
131				drivers/arm/gic/v2/gicv2_main.c		\
132				drivers/arm/gic/common/gic_common.c	\
133				plat/common/plat_gicv2.c		\
134				${PLAT_QEMU_COMMON_PATH}/qemu_gicv2.c
135
136QEMU_GICV3_SOURCES	:=	drivers/arm/gic/v3/gicv3_helpers.c	\
137				drivers/arm/gic/v3/gicv3_main.c		\
138				drivers/arm/gic/common/gic_common.c	\
139				plat/common/plat_gicv3.c		\
140				${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c
141
142ifeq (${QEMU_USE_GIC_DRIVER}, QEMU_GICV2)
143QEMU_GIC_SOURCES	:=	${QEMU_GICV2_SOURCES}
144else ifeq (${QEMU_USE_GIC_DRIVER}, QEMU_GICV3)
145QEMU_GIC_SOURCES	:=	${QEMU_GICV3_SOURCES}
146else
147$(error "Incorrect GIC driver chosen for QEMU platform")
148endif
149
150ifeq (${ARM_ARCH_MAJOR},8)
151BL31_SOURCES		+=	lib/cpus/aarch64/aem_generic.S		\
152				lib/cpus/aarch64/cortex_a53.S		\
153				lib/cpus/aarch64/cortex_a57.S		\
154				plat/common/plat_psci_common.c		\
155				${PLAT_QEMU_COMMON_PATH}/qemu_pm.c			\
156				${PLAT_QEMU_COMMON_PATH}/topology.c			\
157				${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S	\
158				${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c		\
159				${QEMU_GIC_SOURCES}
160endif
161
162# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
163# in the FIP if the platform requires.
164ifneq ($(BL32_EXTRA1),)
165$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
166endif
167ifneq ($(BL32_EXTRA2),)
168$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
169endif
170
171SEPARATE_CODE_AND_RODATA := 1
172ENABLE_STACK_PROTECTOR	 := 0
173ifneq ($(ENABLE_STACK_PROTECTOR), 0)
174	PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
175endif
176
177BL32_RAM_LOCATION	:=	tdram
178ifeq (${BL32_RAM_LOCATION}, tsram)
179  BL32_RAM_LOCATION_ID = SEC_SRAM_ID
180else ifeq (${BL32_RAM_LOCATION}, tdram)
181  BL32_RAM_LOCATION_ID = SEC_DRAM_ID
182else
183  $(error "Unsupported BL32_RAM_LOCATION value")
184endif
185
186# Process flags
187$(eval $(call add_define,BL32_RAM_LOCATION_ID))
188
189# Do not enable SVE
190ENABLE_SVE_FOR_NS	:=	0
191