xref: /rk3399_ARM-atf/plat/qemu/common/qemu_spm.c (revision 986f8330ec207dfe933377cac1c091a8d051d1d5)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright (c) 2020, Linaro Limited and Contributors. All rights reserved.
4  */
5 
6 #include <libfdt.h>
7 
8 #include <bl31/ehf.h>
9 #include <common/debug.h>
10 #include <common/fdt_fixup.h>
11 #include <common/fdt_wrappers.h>
12 #include <lib/xlat_tables/xlat_tables_compat.h>
13 #include <services/spm_mm_partition.h>
14 
15 #include <platform_def.h>
16 
17 /* Region equivalent to MAP_DEVICE1 suitable for mapping at EL0 */
18 #define MAP_DEVICE1_EL0	MAP_REGION_FLAT(DEVICE1_BASE,			\
19 					DEVICE1_SIZE,			\
20 					MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
21 
22 mmap_region_t plat_qemu_secure_partition_mmap[] = {
23 	QEMU_SP_IMAGE_NS_BUF_MMAP,	/* must be placed at first entry */
24 	MAP_DEVICE1_EL0,		/* for the UART */
25 	QEMU_SP_IMAGE_MMAP,
26 	QEMU_SPM_BUF_EL0_MMAP,
27 	QEMU_SP_IMAGE_RW_MMAP,
28 	MAP_SECURE_VARSTORE,
29 	{0}
30 };
31 
32 /*
33  * Boot information passed to a secure partition during initialisation.
34  * Linear indices in MP information will be filled at runtime.
35  */
36 static spm_mm_mp_info_t sp_mp_info[] = {
37 	[0] = {0x80000000, 0},
38 	[1] = {0x80000001, 0},
39 	[2] = {0x80000002, 0},
40 	[3] = {0x80000003, 0},
41 	[4] = {0x80000004, 0},
42 	[5] = {0x80000005, 0},
43 	[6] = {0x80000006, 0},
44 	[7] = {0x80000007, 0}
45 };
46 
47 spm_mm_boot_info_t plat_qemu_secure_partition_boot_info = {
48 	.h.type              = PARAM_SP_IMAGE_BOOT_INFO,
49 	.h.version           = VERSION_1,
50 	.h.size              = sizeof(spm_mm_boot_info_t),
51 	.h.attr              = 0,
52 	.sp_mem_base         = PLAT_QEMU_SP_IMAGE_BASE,
53 	.sp_mem_limit        = BL32_LIMIT,
54 	.sp_image_base       = PLAT_QEMU_SP_IMAGE_BASE,
55 	.sp_stack_base       = PLAT_SP_IMAGE_STACK_BASE,
56 	.sp_heap_base        = PLAT_QEMU_SP_IMAGE_HEAP_BASE,
57 	.sp_ns_comm_buf_base = PLAT_QEMU_SP_IMAGE_NS_BUF_BASE,
58 	.sp_shared_buf_base  = PLAT_SPM_BUF_BASE,
59 	.sp_image_size       = PLAT_QEMU_SP_IMAGE_SIZE,
60 	.sp_pcpu_stack_size  = PLAT_SP_IMAGE_STACK_PCPU_SIZE,
61 	.sp_heap_size        = PLAT_QEMU_SP_IMAGE_HEAP_SIZE,
62 	.sp_ns_comm_buf_size = PLAT_QEMU_SP_IMAGE_NS_BUF_SIZE,
63 	.sp_shared_buf_size  = PLAT_SPM_BUF_SIZE,
64 	.num_sp_mem_regions  = PLAT_QEMU_SP_IMAGE_NUM_MEM_REGIONS,
65 	.num_cpus            = PLATFORM_CORE_COUNT,
66 	.mp_info             = sp_mp_info
67 };
68 
69 /* Enumeration of priority levels on QEMU platforms. */
70 ehf_pri_desc_t qemu_exceptions[] = {
71 	EHF_PRI_DESC(QEMU_PRI_BITS, PLAT_SP_PRI)
72 };
73 
74 int dt_add_ns_buf_node(uintptr_t *base)
75 {
76 	uintptr_t addr;
77 	size_t size;
78 	uintptr_t ns_buf_addr;
79 	int node;
80 	int err;
81 	void *fdt = (void *)ARM_PRELOADED_DTB_BASE;
82 
83 	err = fdt_open_into(fdt, fdt, PLAT_QEMU_DT_MAX_SIZE);
84 	if (err < 0) {
85 		ERROR("Invalid Device Tree at %p: error %d\n", fdt, err);
86 		return err;
87 	}
88 
89 	/*
90 	 * reserved-memory for standaloneMM non-secure buffer
91 	 * is allocated at the top of the first system memory region.
92 	 */
93 	node = fdt_path_offset(fdt, "/memory");
94 
95 	err = fdt_get_reg_props_by_index(fdt, node, 0, &addr, &size);
96 	if (err < 0) {
97 		ERROR("Failed to get the memory node information\n");
98 		return err;
99 	}
100 	INFO("System RAM @ 0x%lx - 0x%lx\n", addr, addr + size - 1);
101 
102 	ns_buf_addr = addr + (size - PLAT_QEMU_SP_IMAGE_NS_BUF_SIZE);
103 	INFO("reserved-memory for spm-mm @ 0x%lx - 0x%llx\n", ns_buf_addr,
104 	     ns_buf_addr + PLAT_QEMU_SP_IMAGE_NS_BUF_SIZE - 1);
105 
106 	err = fdt_add_reserved_memory(fdt, "ns-buf-spm-mm", ns_buf_addr,
107 				      PLAT_QEMU_SP_IMAGE_NS_BUF_SIZE);
108 	if (err < 0) {
109 		ERROR("Failed to add the reserved-memory node\n");
110 		return err;
111 	}
112 
113 	*base = ns_buf_addr;
114 	return 0;
115 }
116 
117 /* Plug in QEMU exceptions to Exception Handling Framework. */
118 EHF_REGISTER_PRIORITIES(qemu_exceptions, ARRAY_SIZE(qemu_exceptions),
119 			QEMU_PRI_BITS);
120 
121 const mmap_region_t *plat_get_secure_partition_mmap(void *cookie)
122 {
123 	uintptr_t ns_buf_base;
124 
125 	dt_add_ns_buf_node(&ns_buf_base);
126 
127 	plat_qemu_secure_partition_mmap[0].base_pa = ns_buf_base;
128 	plat_qemu_secure_partition_mmap[0].base_va = ns_buf_base;
129 	plat_qemu_secure_partition_boot_info.sp_ns_comm_buf_base = ns_buf_base;
130 
131 	return plat_qemu_secure_partition_mmap;
132 }
133 
134 const spm_mm_boot_info_t *
135 plat_get_secure_partition_boot_info(void *cookie)
136 {
137 	return &plat_qemu_secure_partition_boot_info;
138 }
139