xref: /rk3399_ARM-atf/plat/qemu/common/qemu_private.h (revision f90fe02f061b8a203391e566682221396b656c6f)
1 /*
2  * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef QEMU_PRIVATE_H
8 #define QEMU_PRIVATE_H
9 
10 #include <stdint.h>
11 
12 void qemu_configure_mmu_svc_mon(unsigned long total_base,
13 			unsigned long total_size,
14 			unsigned long code_start, unsigned long code_limit,
15 			unsigned long ro_start, unsigned long ro_limit,
16 			unsigned long coh_start, unsigned long coh_limit);
17 
18 void qemu_configure_mmu_el1(unsigned long total_base, unsigned long total_size,
19 			unsigned long code_start, unsigned long code_limit,
20 			unsigned long ro_start, unsigned long ro_limit,
21 			unsigned long coh_start, unsigned long coh_limit);
22 
23 void qemu_configure_mmu_el3(unsigned long total_base, unsigned long total_size,
24 			unsigned long code_start, unsigned long code_limit,
25 			unsigned long ro_start, unsigned long ro_limit,
26 			unsigned long coh_start, unsigned long coh_limit);
27 
28 void plat_qemu_io_setup(void);
29 int qemu_io_register_sp_pkg(const char *name, const char *uuid,
30 			    uintptr_t load_addr);
31 unsigned int plat_qemu_calc_core_pos(u_register_t mpidr);
32 
33 void qemu_console_init(void);
34 
35 void plat_qemu_gic_init(void);
36 void qemu_pwr_gic_on_finish(void);
37 void qemu_pwr_gic_off(void);
38 
39 int qemu_set_tos_fw_info(uintptr_t config_base, uintptr_t log_addr,
40 			size_t log_size);
41 
42 int qemu_set_nt_fw_info(
43 /*
44  * Currently OP-TEE does not support reading DTBs from Secure memory
45  * and this option should be removed when feature is supported.
46  */
47 #ifdef SPD_opteed
48 			uintptr_t log_addr,
49 #endif
50 			size_t log_size,
51 			uintptr_t *ns_log_addr);
52 
53 #endif /* QEMU_PRIVATE_H */
54