1301d27d9SRadoslaw Biernacki /* 2301d27d9SRadoslaw Biernacki * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3301d27d9SRadoslaw Biernacki * 4301d27d9SRadoslaw Biernacki * SPDX-License-Identifier: BSD-3-Clause 5301d27d9SRadoslaw Biernacki */ 6301d27d9SRadoslaw Biernacki 7301d27d9SRadoslaw Biernacki #include <drivers/arm/gicv2.h> 8301d27d9SRadoslaw Biernacki #include <drivers/arm/gic_common.h> 9301d27d9SRadoslaw Biernacki #include <platform_def.h> 10301d27d9SRadoslaw Biernacki 11301d27d9SRadoslaw Biernacki static const interrupt_prop_t qemu_interrupt_props[] = { 12301d27d9SRadoslaw Biernacki PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0), 13301d27d9SRadoslaw Biernacki PLATFORM_G0_PROPS(GICV2_INTR_GROUP0) 14301d27d9SRadoslaw Biernacki }; 15301d27d9SRadoslaw Biernacki 16301d27d9SRadoslaw Biernacki static const struct gicv2_driver_data plat_gicv2_driver_data = { 17301d27d9SRadoslaw Biernacki .gicd_base = GICD_BASE, 18301d27d9SRadoslaw Biernacki .gicc_base = GICC_BASE, 19301d27d9SRadoslaw Biernacki .interrupt_props = qemu_interrupt_props, 20301d27d9SRadoslaw Biernacki .interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props), 21301d27d9SRadoslaw Biernacki }; 22301d27d9SRadoslaw Biernacki 23301d27d9SRadoslaw Biernacki void plat_qemu_gic_init(void) 24301d27d9SRadoslaw Biernacki { 25301d27d9SRadoslaw Biernacki /* Initialize the gic cpu and distributor interfaces */ 26301d27d9SRadoslaw Biernacki gicv2_driver_init(&plat_gicv2_driver_data); 27301d27d9SRadoslaw Biernacki gicv2_distif_init(); 28301d27d9SRadoslaw Biernacki gicv2_pcpu_distif_init(); 29301d27d9SRadoslaw Biernacki gicv2_cpuif_enable(); 30301d27d9SRadoslaw Biernacki } 31301d27d9SRadoslaw Biernacki 32301d27d9SRadoslaw Biernacki void qemu_pwr_gic_on_finish(void) 33301d27d9SRadoslaw Biernacki { 34301d27d9SRadoslaw Biernacki /* TODO: This setup is needed only after a cold boot */ 35301d27d9SRadoslaw Biernacki gicv2_pcpu_distif_init(); 36301d27d9SRadoslaw Biernacki 37301d27d9SRadoslaw Biernacki /* Enable the gic cpu interface */ 38301d27d9SRadoslaw Biernacki gicv2_cpuif_enable(); 39301d27d9SRadoslaw Biernacki } 40*33e8c569SAndrew Walbran 41*33e8c569SAndrew Walbran void qemu_pwr_gic_off(void) 42*33e8c569SAndrew Walbran { 43*33e8c569SAndrew Walbran gicv2_cpuif_disable(); 44*33e8c569SAndrew Walbran } 45