1*301d27d9SRadoslaw Biernacki /* 2*301d27d9SRadoslaw Biernacki * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3*301d27d9SRadoslaw Biernacki * 4*301d27d9SRadoslaw Biernacki * SPDX-License-Identifier: BSD-3-Clause 5*301d27d9SRadoslaw Biernacki */ 6*301d27d9SRadoslaw Biernacki 7*301d27d9SRadoslaw Biernacki #include <drivers/arm/gicv2.h> 8*301d27d9SRadoslaw Biernacki #include <drivers/arm/gic_common.h> 9*301d27d9SRadoslaw Biernacki #include <platform_def.h> 10*301d27d9SRadoslaw Biernacki 11*301d27d9SRadoslaw Biernacki static const interrupt_prop_t qemu_interrupt_props[] = { 12*301d27d9SRadoslaw Biernacki PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0), 13*301d27d9SRadoslaw Biernacki PLATFORM_G0_PROPS(GICV2_INTR_GROUP0) 14*301d27d9SRadoslaw Biernacki }; 15*301d27d9SRadoslaw Biernacki 16*301d27d9SRadoslaw Biernacki static const struct gicv2_driver_data plat_gicv2_driver_data = { 17*301d27d9SRadoslaw Biernacki .gicd_base = GICD_BASE, 18*301d27d9SRadoslaw Biernacki .gicc_base = GICC_BASE, 19*301d27d9SRadoslaw Biernacki .interrupt_props = qemu_interrupt_props, 20*301d27d9SRadoslaw Biernacki .interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props), 21*301d27d9SRadoslaw Biernacki }; 22*301d27d9SRadoslaw Biernacki 23*301d27d9SRadoslaw Biernacki void plat_qemu_gic_init(void) 24*301d27d9SRadoslaw Biernacki { 25*301d27d9SRadoslaw Biernacki /* Initialize the gic cpu and distributor interfaces */ 26*301d27d9SRadoslaw Biernacki gicv2_driver_init(&plat_gicv2_driver_data); 27*301d27d9SRadoslaw Biernacki gicv2_distif_init(); 28*301d27d9SRadoslaw Biernacki gicv2_pcpu_distif_init(); 29*301d27d9SRadoslaw Biernacki gicv2_cpuif_enable(); 30*301d27d9SRadoslaw Biernacki } 31*301d27d9SRadoslaw Biernacki 32*301d27d9SRadoslaw Biernacki void qemu_pwr_gic_on_finish(void) 33*301d27d9SRadoslaw Biernacki { 34*301d27d9SRadoslaw Biernacki /* TODO: This setup is needed only after a cold boot */ 35*301d27d9SRadoslaw Biernacki gicv2_pcpu_distif_init(); 36*301d27d9SRadoslaw Biernacki 37*301d27d9SRadoslaw Biernacki /* Enable the gic cpu interface */ 38*301d27d9SRadoslaw Biernacki gicv2_cpuif_enable(); 39*301d27d9SRadoslaw Biernacki } 40