1 /* 2 * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <common/bl_common.h> 10 #include <drivers/arm/pl061_gpio.h> 11 #include <plat/common/platform.h> 12 13 #include "qemu_private.h" 14 15 #define MAP_BL31_TOTAL MAP_REGION_FLAT( \ 16 BL31_BASE, \ 17 BL31_END - BL31_BASE, \ 18 MT_MEMORY | MT_RW | EL3_PAS) 19 #define MAP_BL31_RO MAP_REGION_FLAT( \ 20 BL_CODE_BASE, \ 21 BL_CODE_END - BL_CODE_BASE, \ 22 MT_CODE | EL3_PAS), \ 23 MAP_REGION_FLAT( \ 24 BL_RO_DATA_BASE, \ 25 BL_RO_DATA_END \ 26 - BL_RO_DATA_BASE, \ 27 MT_RO_DATA | EL3_PAS) 28 29 #define MAP_BL_COHERENT_RAM MAP_REGION_FLAT( \ 30 BL_COHERENT_RAM_BASE, \ 31 BL_COHERENT_RAM_END \ 32 - BL_COHERENT_RAM_BASE, \ 33 MT_DEVICE | MT_RW | EL3_PAS) 34 35 /* 36 * Placeholder variables for copying the arguments that have been passed to 37 * BL3-1 from BL2. 38 */ 39 static entry_point_info_t bl32_image_ep_info; 40 static entry_point_info_t bl33_image_ep_info; 41 42 /******************************************************************************* 43 * Perform any BL3-1 early platform setup. Here is an opportunity to copy 44 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before 45 * they are lost (potentially). This needs to be done before the MMU is 46 * initialized so that the memory layout can be used while creating page 47 * tables. BL2 has flushed this information to memory, so we are guaranteed 48 * to pick up good data. 49 ******************************************************************************/ 50 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 51 u_register_t arg2, u_register_t arg3) 52 { 53 /* Initialize the console to provide early debug support */ 54 qemu_console_init(); 55 56 /* 57 * Check params passed from BL2 58 */ 59 bl_params_t *params_from_bl2 = (bl_params_t *)arg0; 60 61 assert(params_from_bl2); 62 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 63 assert(params_from_bl2->h.version >= VERSION_2); 64 65 bl_params_node_t *bl_params = params_from_bl2->head; 66 67 /* 68 * Copy BL33 and BL32 (if present), entry point information. 69 * They are stored in Secure RAM, in BL2's address space. 70 */ 71 while (bl_params) { 72 if (bl_params->image_id == BL32_IMAGE_ID) 73 bl32_image_ep_info = *bl_params->ep_info; 74 75 if (bl_params->image_id == BL33_IMAGE_ID) 76 bl33_image_ep_info = *bl_params->ep_info; 77 78 bl_params = bl_params->next_params_info; 79 } 80 81 if (!bl33_image_ep_info.pc) 82 panic(); 83 } 84 85 void bl31_plat_arch_setup(void) 86 { 87 const mmap_region_t bl_regions[] = { 88 MAP_BL31_TOTAL, 89 MAP_BL31_RO, 90 MAP_BL_COHERENT_RAM, 91 {0} 92 }; 93 94 setup_page_tables(bl_regions, plat_qemu_get_mmap()); 95 96 enable_mmu_el3(0); 97 } 98 99 static void qemu_gpio_init(void) 100 { 101 #ifdef SECURE_GPIO_BASE 102 pl061_gpio_init(); 103 pl061_gpio_register(SECURE_GPIO_BASE, 0); 104 #endif 105 } 106 107 void bl31_platform_setup(void) 108 { 109 plat_qemu_gic_init(); 110 qemu_gpio_init(); 111 } 112 113 unsigned int plat_get_syscnt_freq2(void) 114 { 115 return SYS_COUNTER_FREQ_IN_TICKS; 116 } 117 118 /******************************************************************************* 119 * Return a pointer to the 'entry_point_info' structure of the next image 120 * for the security state specified. BL3-3 corresponds to the non-secure 121 * image type while BL3-2 corresponds to the secure image type. A NULL 122 * pointer is returned if the image does not exist. 123 ******************************************************************************/ 124 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 125 { 126 entry_point_info_t *next_image_info; 127 128 assert(sec_state_is_valid(type)); 129 next_image_info = (type == NON_SECURE) 130 ? &bl33_image_ep_info : &bl32_image_ep_info; 131 /* 132 * None of the images on the ARM development platforms can have 0x0 133 * as the entrypoint 134 */ 135 if (next_image_info->pc) 136 return next_image_info; 137 else 138 return NULL; 139 } 140