1301d27d9SRadoslaw Biernacki /* 2301d27d9SRadoslaw Biernacki * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3301d27d9SRadoslaw Biernacki * 4301d27d9SRadoslaw Biernacki * SPDX-License-Identifier: BSD-3-Clause 5301d27d9SRadoslaw Biernacki */ 6301d27d9SRadoslaw Biernacki 7301d27d9SRadoslaw Biernacki #include <assert.h> 8301d27d9SRadoslaw Biernacki 9301d27d9SRadoslaw Biernacki #include <common/bl_common.h> 10ffb07b04SMaxim Uvarov #include <drivers/arm/pl061_gpio.h> 11301d27d9SRadoslaw Biernacki #include <plat/common/platform.h> 12301d27d9SRadoslaw Biernacki 13301d27d9SRadoslaw Biernacki #include "qemu_private.h" 14301d27d9SRadoslaw Biernacki 15a12cb77cSChen Baozi #define MAP_BL31_TOTAL MAP_REGION_FLAT( \ 16a12cb77cSChen Baozi BL31_BASE, \ 17a12cb77cSChen Baozi BL31_END - BL31_BASE, \ 18a12cb77cSChen Baozi MT_MEMORY | MT_RW | EL3_PAS) 19a12cb77cSChen Baozi #define MAP_BL31_RO MAP_REGION_FLAT( \ 20a12cb77cSChen Baozi BL_CODE_BASE, \ 21a12cb77cSChen Baozi BL_CODE_END - BL_CODE_BASE, \ 22a12cb77cSChen Baozi MT_CODE | EL3_PAS), \ 23a12cb77cSChen Baozi MAP_REGION_FLAT( \ 24a12cb77cSChen Baozi BL_RO_DATA_BASE, \ 25a12cb77cSChen Baozi BL_RO_DATA_END \ 26a12cb77cSChen Baozi - BL_RO_DATA_BASE, \ 27a12cb77cSChen Baozi MT_RO_DATA | EL3_PAS) 28a12cb77cSChen Baozi 29*af994ae8SChen Baozi #if USE_COHERENT_MEM 30a12cb77cSChen Baozi #define MAP_BL_COHERENT_RAM MAP_REGION_FLAT( \ 31a12cb77cSChen Baozi BL_COHERENT_RAM_BASE, \ 32a12cb77cSChen Baozi BL_COHERENT_RAM_END \ 33a12cb77cSChen Baozi - BL_COHERENT_RAM_BASE, \ 34a12cb77cSChen Baozi MT_DEVICE | MT_RW | EL3_PAS) 35*af994ae8SChen Baozi #endif 36a12cb77cSChen Baozi 37301d27d9SRadoslaw Biernacki /* 38301d27d9SRadoslaw Biernacki * Placeholder variables for copying the arguments that have been passed to 39301d27d9SRadoslaw Biernacki * BL3-1 from BL2. 40301d27d9SRadoslaw Biernacki */ 41301d27d9SRadoslaw Biernacki static entry_point_info_t bl32_image_ep_info; 42301d27d9SRadoslaw Biernacki static entry_point_info_t bl33_image_ep_info; 43301d27d9SRadoslaw Biernacki 44301d27d9SRadoslaw Biernacki /******************************************************************************* 45301d27d9SRadoslaw Biernacki * Perform any BL3-1 early platform setup. Here is an opportunity to copy 46301d27d9SRadoslaw Biernacki * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before 47301d27d9SRadoslaw Biernacki * they are lost (potentially). This needs to be done before the MMU is 48301d27d9SRadoslaw Biernacki * initialized so that the memory layout can be used while creating page 49301d27d9SRadoslaw Biernacki * tables. BL2 has flushed this information to memory, so we are guaranteed 50301d27d9SRadoslaw Biernacki * to pick up good data. 51301d27d9SRadoslaw Biernacki ******************************************************************************/ 52301d27d9SRadoslaw Biernacki void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 53301d27d9SRadoslaw Biernacki u_register_t arg2, u_register_t arg3) 54301d27d9SRadoslaw Biernacki { 55301d27d9SRadoslaw Biernacki /* Initialize the console to provide early debug support */ 56301d27d9SRadoslaw Biernacki qemu_console_init(); 57301d27d9SRadoslaw Biernacki 58301d27d9SRadoslaw Biernacki /* 59301d27d9SRadoslaw Biernacki * Check params passed from BL2 60301d27d9SRadoslaw Biernacki */ 61301d27d9SRadoslaw Biernacki bl_params_t *params_from_bl2 = (bl_params_t *)arg0; 62301d27d9SRadoslaw Biernacki 63301d27d9SRadoslaw Biernacki assert(params_from_bl2); 64301d27d9SRadoslaw Biernacki assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 65301d27d9SRadoslaw Biernacki assert(params_from_bl2->h.version >= VERSION_2); 66301d27d9SRadoslaw Biernacki 67301d27d9SRadoslaw Biernacki bl_params_node_t *bl_params = params_from_bl2->head; 68301d27d9SRadoslaw Biernacki 69301d27d9SRadoslaw Biernacki /* 70301d27d9SRadoslaw Biernacki * Copy BL33 and BL32 (if present), entry point information. 71301d27d9SRadoslaw Biernacki * They are stored in Secure RAM, in BL2's address space. 72301d27d9SRadoslaw Biernacki */ 73301d27d9SRadoslaw Biernacki while (bl_params) { 74301d27d9SRadoslaw Biernacki if (bl_params->image_id == BL32_IMAGE_ID) 75301d27d9SRadoslaw Biernacki bl32_image_ep_info = *bl_params->ep_info; 76301d27d9SRadoslaw Biernacki 77301d27d9SRadoslaw Biernacki if (bl_params->image_id == BL33_IMAGE_ID) 78301d27d9SRadoslaw Biernacki bl33_image_ep_info = *bl_params->ep_info; 79301d27d9SRadoslaw Biernacki 80301d27d9SRadoslaw Biernacki bl_params = bl_params->next_params_info; 81301d27d9SRadoslaw Biernacki } 82301d27d9SRadoslaw Biernacki 83301d27d9SRadoslaw Biernacki if (!bl33_image_ep_info.pc) 84301d27d9SRadoslaw Biernacki panic(); 85301d27d9SRadoslaw Biernacki } 86301d27d9SRadoslaw Biernacki 87301d27d9SRadoslaw Biernacki void bl31_plat_arch_setup(void) 88301d27d9SRadoslaw Biernacki { 89a12cb77cSChen Baozi const mmap_region_t bl_regions[] = { 90a12cb77cSChen Baozi MAP_BL31_TOTAL, 91a12cb77cSChen Baozi MAP_BL31_RO, 92*af994ae8SChen Baozi #if USE_COHERENT_MEM 93a12cb77cSChen Baozi MAP_BL_COHERENT_RAM, 94*af994ae8SChen Baozi #endif 95a12cb77cSChen Baozi {0} 96a12cb77cSChen Baozi }; 97a12cb77cSChen Baozi 98a12cb77cSChen Baozi setup_page_tables(bl_regions, plat_qemu_get_mmap()); 99a12cb77cSChen Baozi 100a12cb77cSChen Baozi enable_mmu_el3(0); 101301d27d9SRadoslaw Biernacki } 102301d27d9SRadoslaw Biernacki 103ffb07b04SMaxim Uvarov static void qemu_gpio_init(void) 104ffb07b04SMaxim Uvarov { 105ffb07b04SMaxim Uvarov #ifdef SECURE_GPIO_BASE 106ffb07b04SMaxim Uvarov pl061_gpio_init(); 107ffb07b04SMaxim Uvarov pl061_gpio_register(SECURE_GPIO_BASE, 0); 108ffb07b04SMaxim Uvarov #endif 109ffb07b04SMaxim Uvarov } 110ffb07b04SMaxim Uvarov 111301d27d9SRadoslaw Biernacki void bl31_platform_setup(void) 112301d27d9SRadoslaw Biernacki { 113301d27d9SRadoslaw Biernacki plat_qemu_gic_init(); 114ffb07b04SMaxim Uvarov qemu_gpio_init(); 115301d27d9SRadoslaw Biernacki } 116301d27d9SRadoslaw Biernacki 117301d27d9SRadoslaw Biernacki unsigned int plat_get_syscnt_freq2(void) 118301d27d9SRadoslaw Biernacki { 119301d27d9SRadoslaw Biernacki return SYS_COUNTER_FREQ_IN_TICKS; 120301d27d9SRadoslaw Biernacki } 121301d27d9SRadoslaw Biernacki 122301d27d9SRadoslaw Biernacki /******************************************************************************* 123301d27d9SRadoslaw Biernacki * Return a pointer to the 'entry_point_info' structure of the next image 124301d27d9SRadoslaw Biernacki * for the security state specified. BL3-3 corresponds to the non-secure 125301d27d9SRadoslaw Biernacki * image type while BL3-2 corresponds to the secure image type. A NULL 126301d27d9SRadoslaw Biernacki * pointer is returned if the image does not exist. 127301d27d9SRadoslaw Biernacki ******************************************************************************/ 128301d27d9SRadoslaw Biernacki entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 129301d27d9SRadoslaw Biernacki { 130301d27d9SRadoslaw Biernacki entry_point_info_t *next_image_info; 131301d27d9SRadoslaw Biernacki 132301d27d9SRadoslaw Biernacki assert(sec_state_is_valid(type)); 133301d27d9SRadoslaw Biernacki next_image_info = (type == NON_SECURE) 134301d27d9SRadoslaw Biernacki ? &bl33_image_ep_info : &bl32_image_ep_info; 135301d27d9SRadoslaw Biernacki /* 136301d27d9SRadoslaw Biernacki * None of the images on the ARM development platforms can have 0x0 137301d27d9SRadoslaw Biernacki * as the entrypoint 138301d27d9SRadoslaw Biernacki */ 139301d27d9SRadoslaw Biernacki if (next_image_info->pc) 140301d27d9SRadoslaw Biernacki return next_image_info; 141301d27d9SRadoslaw Biernacki else 142301d27d9SRadoslaw Biernacki return NULL; 143301d27d9SRadoslaw Biernacki } 144