1# 2# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include lib/libfdt/libfdt.mk 8include common/fdt_wrappers.mk 9 10PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 11 -I${PLAT_QEMU_COMMON_PATH}/include \ 12 -I${PLAT_QEMU_PATH}/include \ 13 -Iinclude/common/tbbr 14 15ifeq (${ARCH},aarch32) 16QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S 17else 18QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ 19 lib/cpus/aarch64/cortex_a53.S \ 20 lib/cpus/aarch64/cortex_a57.S \ 21 lib/cpus/aarch64/cortex_a72.S \ 22 lib/cpus/aarch64/cortex_a76.S \ 23 lib/cpus/aarch64/neoverse_n_common.S \ 24 lib/cpus/aarch64/neoverse_n1.S \ 25 lib/cpus/aarch64/neoverse_v1.S \ 26 lib/cpus/aarch64/qemu_max.S 27 28PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 29endif 30 31PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 32 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 33 drivers/arm/pl011/${ARCH}/pl011_console.S 34 35include lib/xlat_tables_v2/xlat_tables.mk 36PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 37 38ifneq ($(ENABLE_STACK_PROTECTOR), 0) 39 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 40endif 41 42BL1_SOURCES += drivers/io/io_semihosting.c \ 43 drivers/io/io_storage.c \ 44 drivers/io/io_fip.c \ 45 drivers/io/io_memmap.c \ 46 lib/semihosting/semihosting.c \ 47 lib/semihosting/${ARCH}/semihosting_call.S \ 48 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 49 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 50 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \ 51 ${QEMU_CPU_LIBS} 52 53BL2_SOURCES += drivers/io/io_semihosting.c \ 54 drivers/io/io_storage.c \ 55 drivers/io/io_fip.c \ 56 drivers/io/io_memmap.c \ 57 lib/semihosting/semihosting.c \ 58 lib/semihosting/${ARCH}/semihosting_call.S \ 59 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 60 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 61 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 62 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 63 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 64 common/desc_image_load.c \ 65 common/fdt_fixup.c 66 67BL31_SOURCES += ${QEMU_CPU_LIBS} \ 68 lib/semihosting/semihosting.c \ 69 lib/semihosting/${ARCH}/semihosting_call.S \ 70 plat/common/plat_psci_common.c \ 71 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 72 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 73 common/fdt_fixup.c \ 74 ${QEMU_GIC_SOURCES} 75 76# CPU flag enablement 77ifeq (${ARCH},aarch64) 78 79# Later QEMU versions support SME and SVE. 80# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks) 81ifeq (${SPM_MM},1) 82 ENABLE_SVE_FOR_NS := 0 83 ENABLE_SME_FOR_NS := 0 84else 85 ENABLE_SVE_FOR_NS := 2 86 ENABLE_SME_FOR_NS := 2 87endif 88 89# QEMU will use the RNDR instruction for the stack protector canary. 90ENABLE_FEAT_RNG := 2 91 92# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max 93ENABLE_FEAT_FGT := 2 94 95# Treating this as a memory-constrained port for now 96USE_COHERENT_MEM := 0 97 98# This can be overridden depending on CPU(s) used in the QEMU image 99HW_ASSISTED_COHERENCY := 1 100 101CTX_INCLUDE_AARCH32_REGS := 0 102ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 103$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 104endif 105 106# Pointer Authentication sources 107ifeq (${ENABLE_PAUTH}, 1) 108PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 109CTX_INCLUDE_PAUTH_REGS := 1 110endif 111 112endif 113