1301d27d9SRadoslaw Biernacki/* 2*831b0e98SJimmy Brisson * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3301d27d9SRadoslaw Biernacki * 4301d27d9SRadoslaw Biernacki * SPDX-License-Identifier: BSD-3-Clause 5301d27d9SRadoslaw Biernacki */ 6301d27d9SRadoslaw Biernacki 7301d27d9SRadoslaw Biernacki#include <arch.h> 8301d27d9SRadoslaw Biernacki#include <asm_macros.S> 9301d27d9SRadoslaw Biernacki#include <assert_macros.S> 10301d27d9SRadoslaw Biernacki#include <platform_def.h> 11301d27d9SRadoslaw Biernacki 12301d27d9SRadoslaw Biernacki .globl plat_my_core_pos 13301d27d9SRadoslaw Biernacki .globl plat_get_my_entrypoint 14301d27d9SRadoslaw Biernacki .globl platform_mem_init 15301d27d9SRadoslaw Biernacki .globl plat_qemu_calc_core_pos 16301d27d9SRadoslaw Biernacki .globl plat_crash_console_init 17301d27d9SRadoslaw Biernacki .globl plat_crash_console_putc 18301d27d9SRadoslaw Biernacki .globl plat_crash_console_flush 19301d27d9SRadoslaw Biernacki .globl plat_secondary_cold_boot_setup 20301d27d9SRadoslaw Biernacki .globl plat_get_my_entrypoint 21301d27d9SRadoslaw Biernacki .globl plat_is_my_cpu_primary 22301d27d9SRadoslaw Biernacki 23301d27d9SRadoslaw Biernackifunc plat_my_core_pos 24301d27d9SRadoslaw Biernacki mrs x0, mpidr_el1 25301d27d9SRadoslaw Biernacki b plat_qemu_calc_core_pos 26301d27d9SRadoslaw Biernackiendfunc plat_my_core_pos 27301d27d9SRadoslaw Biernacki 28301d27d9SRadoslaw Biernacki/* 29301d27d9SRadoslaw Biernacki * unsigned int plat_qemu_calc_core_pos(u_register_t mpidr); 30301d27d9SRadoslaw Biernacki * With this function: CorePos = (ClusterId * 4) + CoreId 31301d27d9SRadoslaw Biernacki */ 32301d27d9SRadoslaw Biernackifunc plat_qemu_calc_core_pos 33301d27d9SRadoslaw Biernacki and x1, x0, #MPIDR_CPU_MASK 34301d27d9SRadoslaw Biernacki and x0, x0, #MPIDR_CLUSTER_MASK 35301d27d9SRadoslaw Biernacki add x0, x1, x0, LSR #6 36301d27d9SRadoslaw Biernacki ret 37301d27d9SRadoslaw Biernackiendfunc plat_qemu_calc_core_pos 38301d27d9SRadoslaw Biernacki 39301d27d9SRadoslaw Biernacki /* ----------------------------------------------------- 40301d27d9SRadoslaw Biernacki * unsigned int plat_is_my_cpu_primary (void); 41301d27d9SRadoslaw Biernacki * 42301d27d9SRadoslaw Biernacki * Find out whether the current cpu is the primary 43301d27d9SRadoslaw Biernacki * cpu. 44301d27d9SRadoslaw Biernacki * ----------------------------------------------------- 45301d27d9SRadoslaw Biernacki */ 46301d27d9SRadoslaw Biernackifunc plat_is_my_cpu_primary 47301d27d9SRadoslaw Biernacki mrs x0, mpidr_el1 48301d27d9SRadoslaw Biernacki and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 49301d27d9SRadoslaw Biernacki cmp x0, #QEMU_PRIMARY_CPU 50301d27d9SRadoslaw Biernacki cset w0, eq 51301d27d9SRadoslaw Biernacki ret 52301d27d9SRadoslaw Biernackiendfunc plat_is_my_cpu_primary 53301d27d9SRadoslaw Biernacki 54301d27d9SRadoslaw Biernacki /* ----------------------------------------------------- 55301d27d9SRadoslaw Biernacki * void plat_secondary_cold_boot_setup (void); 56301d27d9SRadoslaw Biernacki * 57301d27d9SRadoslaw Biernacki * This function performs any platform specific actions 58301d27d9SRadoslaw Biernacki * needed for a secondary cpu after a cold reset e.g 59301d27d9SRadoslaw Biernacki * mark the cpu's presence, mechanism to place it in a 60301d27d9SRadoslaw Biernacki * holding pen etc. 61301d27d9SRadoslaw Biernacki * ----------------------------------------------------- 62301d27d9SRadoslaw Biernacki */ 63301d27d9SRadoslaw Biernackifunc plat_secondary_cold_boot_setup 64301d27d9SRadoslaw Biernacki /* Calculate address of our hold entry */ 65301d27d9SRadoslaw Biernacki bl plat_my_core_pos 66301d27d9SRadoslaw Biernacki lsl x0, x0, #PLAT_QEMU_HOLD_ENTRY_SHIFT 67301d27d9SRadoslaw Biernacki mov_imm x2, PLAT_QEMU_HOLD_BASE 68301d27d9SRadoslaw Biernacki 69301d27d9SRadoslaw Biernacki /* Wait until we have a go */ 70301d27d9SRadoslaw Biernackipoll_mailbox: 71301d27d9SRadoslaw Biernacki ldr x1, [x2, x0] 72301d27d9SRadoslaw Biernacki cbz x1, 1f 7333e8c569SAndrew Walbran 7433e8c569SAndrew Walbran /* Clear the mailbox again ready for next time. */ 7533e8c569SAndrew Walbran mov x1, #PLAT_QEMU_HOLD_STATE_WAIT 7633e8c569SAndrew Walbran str x1, [x2, x0] 7733e8c569SAndrew Walbran 7833e8c569SAndrew Walbran /* Jump to the provided entrypoint. */ 79301d27d9SRadoslaw Biernacki mov_imm x0, PLAT_QEMU_TRUSTED_MAILBOX_BASE 80301d27d9SRadoslaw Biernacki ldr x1, [x0] 81301d27d9SRadoslaw Biernacki br x1 82301d27d9SRadoslaw Biernacki1: 83301d27d9SRadoslaw Biernacki wfe 84301d27d9SRadoslaw Biernacki b poll_mailbox 85301d27d9SRadoslaw Biernackiendfunc plat_secondary_cold_boot_setup 86301d27d9SRadoslaw Biernacki 87301d27d9SRadoslaw Biernackifunc plat_get_my_entrypoint 88301d27d9SRadoslaw Biernacki /* TODO support warm boot */ 89301d27d9SRadoslaw Biernacki mov x0, #0 90301d27d9SRadoslaw Biernacki ret 91301d27d9SRadoslaw Biernackiendfunc plat_get_my_entrypoint 92301d27d9SRadoslaw Biernacki 93301d27d9SRadoslaw Biernackifunc platform_mem_init 94301d27d9SRadoslaw Biernacki ret 95301d27d9SRadoslaw Biernackiendfunc platform_mem_init 96301d27d9SRadoslaw Biernacki 97301d27d9SRadoslaw Biernacki /* --------------------------------------------- 98301d27d9SRadoslaw Biernacki * int plat_crash_console_init(void) 99301d27d9SRadoslaw Biernacki * Function to initialize the crash console 100301d27d9SRadoslaw Biernacki * without a C Runtime to print crash report. 101301d27d9SRadoslaw Biernacki * Clobber list : x0, x1, x2 102301d27d9SRadoslaw Biernacki * --------------------------------------------- 103301d27d9SRadoslaw Biernacki */ 104301d27d9SRadoslaw Biernackifunc plat_crash_console_init 105301d27d9SRadoslaw Biernacki mov_imm x0, PLAT_QEMU_CRASH_UART_BASE 106301d27d9SRadoslaw Biernacki mov_imm x1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ 107301d27d9SRadoslaw Biernacki mov_imm x2, PLAT_QEMU_CONSOLE_BAUDRATE 108301d27d9SRadoslaw Biernacki b console_pl011_core_init 109301d27d9SRadoslaw Biernackiendfunc plat_crash_console_init 110301d27d9SRadoslaw Biernacki 111301d27d9SRadoslaw Biernacki /* --------------------------------------------- 112301d27d9SRadoslaw Biernacki * int plat_crash_console_putc(int c) 113301d27d9SRadoslaw Biernacki * Function to print a character on the crash 114301d27d9SRadoslaw Biernacki * console without a C Runtime. 115301d27d9SRadoslaw Biernacki * Clobber list : x1, x2 116301d27d9SRadoslaw Biernacki * --------------------------------------------- 117301d27d9SRadoslaw Biernacki */ 118301d27d9SRadoslaw Biernackifunc plat_crash_console_putc 119301d27d9SRadoslaw Biernacki mov_imm x1, PLAT_QEMU_CRASH_UART_BASE 120301d27d9SRadoslaw Biernacki b console_pl011_core_putc 121301d27d9SRadoslaw Biernackiendfunc plat_crash_console_putc 122301d27d9SRadoslaw Biernacki 123301d27d9SRadoslaw Biernacki /* --------------------------------------------- 124*831b0e98SJimmy Brisson * void plat_crash_console_flush(int c) 125301d27d9SRadoslaw Biernacki * Function to force a write of all buffered 126301d27d9SRadoslaw Biernacki * data that hasn't been output. 127*831b0e98SJimmy Brisson * Out : void. 128301d27d9SRadoslaw Biernacki * Clobber list : x0, x1 129301d27d9SRadoslaw Biernacki * --------------------------------------------- 130301d27d9SRadoslaw Biernacki */ 131301d27d9SRadoslaw Biernackifunc plat_crash_console_flush 132301d27d9SRadoslaw Biernacki mov_imm x0, PLAT_QEMU_CRASH_UART_BASE 133301d27d9SRadoslaw Biernacki b console_pl011_core_flush 134301d27d9SRadoslaw Biernackiendfunc plat_crash_console_flush 135301d27d9SRadoslaw Biernacki 136