1*1f497308SPankaj Gupta# 2*1f497308SPankaj Gupta# Copyright 2018-2020 NXP 3*1f497308SPankaj Gupta# 4*1f497308SPankaj Gupta# SPDX-License-Identifier: BSD-3-Clause 5*1f497308SPankaj Gupta# 6*1f497308SPankaj Gupta 7*1f497308SPankaj Gupta# board-specific build parameters 8*1f497308SPankaj Gupta 9*1f497308SPankaj GuptaBOOT_MODE ?= flexspi_nor 10*1f497308SPankaj GuptaBOARD ?= lx2162aqds 11*1f497308SPankaj GuptaPOVDD_ENABLE := no 12*1f497308SPankaj GuptaNXP_COINED_BB := no 13*1f497308SPankaj Gupta 14*1f497308SPankaj Gupta # DDR Compilation Configs 15*1f497308SPankaj GuptaNUM_OF_DDRC := 1 16*1f497308SPankaj GuptaDDRC_NUM_DIMM := 1 17*1f497308SPankaj GuptaDDRC_NUM_CS := 2 18*1f497308SPankaj GuptaDDR_ECC_EN := yes 19*1f497308SPankaj Gupta #enable address decoding feature 20*1f497308SPankaj GuptaDDR_ADDR_DEC := yes 21*1f497308SPankaj GuptaAPPLY_MAX_CDD := yes 22*1f497308SPankaj Gupta 23*1f497308SPankaj Gupta# DDR Errata 24*1f497308SPankaj GuptaERRATA_DDR_A011396 := 1 25*1f497308SPankaj GuptaERRATA_DDR_A050450 := 1 26*1f497308SPankaj Gupta 27*1f497308SPankaj Gupta 28*1f497308SPankaj Gupta # On-Board Flash Details 29*1f497308SPankaj GuptaFLASH_TYPE := MT35XU512A 30*1f497308SPankaj GuptaXSPI_FLASH_SZ := 0x10000000 31*1f497308SPankaj GuptaNXP_XSPI_NOR_UNIT_SIZE := 0x20000 32*1f497308SPankaj GuptaBL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000 33*1f497308SPankaj Gupta# CONFIG_FSPI_ERASE_4K is required to erase 4K sector sizes. This 34*1f497308SPankaj Gupta# config is enabled for future use cases. 35*1f497308SPankaj GuptaFSPI_ERASE_4K := 0 36*1f497308SPankaj Gupta 37*1f497308SPankaj Gupta # Platform specific features. 38*1f497308SPankaj GuptaWARM_BOOT := yes 39*1f497308SPankaj Gupta 40*1f497308SPankaj Gupta # Adding platform specific defines 41*1f497308SPankaj Gupta 42*1f497308SPankaj Gupta$(eval $(call add_define_val,BOARD,'"${BOARD}"')) 43*1f497308SPankaj Gupta 44*1f497308SPankaj Guptaifeq (${POVDD_ENABLE},yes) 45*1f497308SPankaj Gupta$(eval $(call add_define,CONFIG_POVDD_ENABLE)) 46*1f497308SPankaj Guptaendif 47*1f497308SPankaj Gupta 48*1f497308SPankaj Guptaifneq (${FLASH_TYPE},) 49*1f497308SPankaj Gupta$(eval $(call add_define,CONFIG_${FLASH_TYPE})) 50*1f497308SPankaj Guptaendif 51*1f497308SPankaj Gupta 52*1f497308SPankaj Guptaifneq (${XSPI_FLASH_SZ},) 53*1f497308SPankaj Gupta$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ})) 54*1f497308SPankaj Guptaendif 55*1f497308SPankaj Gupta 56*1f497308SPankaj Guptaifneq (${FSPI_ERASE_4K},) 57*1f497308SPankaj Gupta$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K})) 58*1f497308SPankaj Guptaendif 59*1f497308SPankaj Gupta 60*1f497308SPankaj Guptaifneq (${NUM_OF_DDRC},) 61*1f497308SPankaj Gupta$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC})) 62*1f497308SPankaj Guptaendif 63*1f497308SPankaj Gupta 64*1f497308SPankaj Guptaifneq (${DDRC_NUM_DIMM},) 65*1f497308SPankaj Gupta$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM})) 66*1f497308SPankaj Guptaendif 67*1f497308SPankaj Gupta 68*1f497308SPankaj Guptaifneq (${DDRC_NUM_CS},) 69*1f497308SPankaj Gupta$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS})) 70*1f497308SPankaj Guptaendif 71*1f497308SPankaj Gupta 72*1f497308SPankaj Guptaifeq (${DDR_ADDR_DEC},yes) 73*1f497308SPankaj Gupta$(eval $(call add_define,CONFIG_DDR_ADDR_DEC)) 74*1f497308SPankaj Guptaendif 75*1f497308SPankaj Gupta 76*1f497308SPankaj Guptaifeq (${DDR_ECC_EN},yes) 77*1f497308SPankaj Gupta$(eval $(call add_define,CONFIG_DDR_ECC_EN)) 78*1f497308SPankaj Guptaendif 79*1f497308SPankaj Gupta 80*1f497308SPankaj Gupta# Platform can control the base address for non-volatile storage. 81*1f497308SPankaj Gupta#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}')) 82*1f497308SPankaj Gupta 83*1f497308SPankaj Guptaifeq (${WARM_BOOT},yes) 84*1f497308SPankaj Gupta$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}')) 85*1f497308SPankaj Guptaendif 86*1f497308SPankaj Gupta 87*1f497308SPankaj Gupta # Adding Platform files build files 88*1f497308SPankaj GuptaBL2_SOURCES += ${BOARD_PATH}/ddr_init.c\ 89*1f497308SPankaj Gupta ${BOARD_PATH}/platform.c 90*1f497308SPankaj Gupta 91*1f497308SPankaj Gupta # Adding SoC build info 92*1f497308SPankaj Guptainclude plat/nxp/soc-lx2160a/soc.mk 93