1# 2# Copyright 2021 NXP 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# board-specific build parameters 8 9BOOT_MODE ?= flexspi_nor 10BOARD ?= lx2160ardb 11POVDD_ENABLE := no 12NXP_COINED_BB := no 13 14 # DDR Compilation Configs 15NUM_OF_DDRC := 2 16DDRC_NUM_DIMM := 2 17DDRC_NUM_CS := 4 18DDR_ECC_EN := yes 19 #enable address decoding feature 20DDR_ADDR_DEC := yes 21APPLY_MAX_CDD := yes 22 23# DDR Errata 24ERRATA_DDR_A011396 := 1 25ERRATA_DDR_A050450 := 1 26 27 # On-Board Flash Details 28FLASH_TYPE := MT35XU512A 29XSPI_FLASH_SZ := 0x10000000 30NXP_XSPI_NOR_UNIT_SIZE := 0x20000 31BL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000 32# CONFIG_FSPI_ERASE_4K is required to erase 4K sector sizes. This 33# config is enabled for future use cases. 34FSPI_ERASE_4K := 0 35 36 # Platform specific features. 37WARM_BOOT := no 38 39 # Adding platform specific defines 40 41$(eval $(call add_define_val,BOARD,'"${BOARD}"')) 42 43ifeq (${POVDD_ENABLE},yes) 44$(eval $(call add_define,CONFIG_POVDD_ENABLE)) 45endif 46 47ifneq (${FLASH_TYPE},) 48$(eval $(call add_define,CONFIG_${FLASH_TYPE})) 49endif 50 51ifneq (${XSPI_FLASH_SZ},) 52$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ})) 53endif 54 55ifneq (${FSPI_ERASE_4K},) 56$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K})) 57endif 58 59ifneq (${NUM_OF_DDRC},) 60$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC})) 61endif 62 63ifneq (${DDRC_NUM_DIMM},) 64$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM})) 65endif 66 67ifneq (${DDRC_NUM_CS},) 68$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS})) 69endif 70 71ifeq (${DDR_ADDR_DEC},yes) 72$(eval $(call add_define,CONFIG_DDR_ADDR_DEC)) 73endif 74 75ifeq (${DDR_ECC_EN},yes) 76$(eval $(call add_define,CONFIG_DDR_ECC_EN)) 77endif 78 79# Platform can control the base address for non-volatile storage. 80#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}')) 81 82ifeq (${WARM_BOOT},yes) 83$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}')) 84endif 85 86 # Adding Platform files build files 87BL2_SOURCES += ${BOARD_PATH}/ddr_init.c\ 88 ${BOARD_PATH}/platform.c 89 90 # Adding SoC build info 91include plat/nxp/soc-lx2160a/soc.mk 92