1*eb2b193dSPankaj Gupta# 2*eb2b193dSPankaj Gupta# Copyright 2021 NXP 3*eb2b193dSPankaj Gupta# 4*eb2b193dSPankaj Gupta# SPDX-License-Identifier: BSD-3-Clause 5*eb2b193dSPankaj Gupta# 6*eb2b193dSPankaj Gupta 7*eb2b193dSPankaj Gupta# board-specific build parameters 8*eb2b193dSPankaj Gupta 9*eb2b193dSPankaj GuptaBOOT_MODE ?= flexspi_nor 10*eb2b193dSPankaj GuptaBOARD ?= lx2160ardb 11*eb2b193dSPankaj GuptaPOVDD_ENABLE := no 12*eb2b193dSPankaj GuptaNXP_COINED_BB := no 13*eb2b193dSPankaj Gupta 14*eb2b193dSPankaj Gupta # DDR Compilation Configs 15*eb2b193dSPankaj GuptaNUM_OF_DDRC := 2 16*eb2b193dSPankaj GuptaDDRC_NUM_DIMM := 2 17*eb2b193dSPankaj GuptaDDRC_NUM_CS := 4 18*eb2b193dSPankaj GuptaDDR_ECC_EN := yes 19*eb2b193dSPankaj Gupta #enable address decoding feature 20*eb2b193dSPankaj GuptaDDR_ADDR_DEC := yes 21*eb2b193dSPankaj GuptaAPPLY_MAX_CDD := yes 22*eb2b193dSPankaj Gupta 23*eb2b193dSPankaj Gupta# DDR Errata 24*eb2b193dSPankaj GuptaERRATA_DDR_A011396 := 1 25*eb2b193dSPankaj GuptaERRATA_DDR_A050450 := 1 26*eb2b193dSPankaj Gupta 27*eb2b193dSPankaj Gupta # On-Board Flash Details 28*eb2b193dSPankaj GuptaFLASH_TYPE := MT35XU512A 29*eb2b193dSPankaj GuptaXSPI_FLASH_SZ := 0x10000000 30*eb2b193dSPankaj GuptaNXP_XSPI_NOR_UNIT_SIZE := 0x20000 31*eb2b193dSPankaj GuptaBL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000 32*eb2b193dSPankaj Gupta# CONFIG_FSPI_ERASE_4K is required to erase 4K sector sizes. This 33*eb2b193dSPankaj Gupta# config is enabled for future use cases. 34*eb2b193dSPankaj GuptaFSPI_ERASE_4K := 0 35*eb2b193dSPankaj Gupta 36*eb2b193dSPankaj Gupta # Platform specific features. 37*eb2b193dSPankaj GuptaWARM_BOOT := no 38*eb2b193dSPankaj Gupta 39*eb2b193dSPankaj Gupta # Adding platform specific defines 40*eb2b193dSPankaj Gupta 41*eb2b193dSPankaj Gupta$(eval $(call add_define_val,BOARD,'"${BOARD}"')) 42*eb2b193dSPankaj Gupta 43*eb2b193dSPankaj Guptaifeq (${POVDD_ENABLE},yes) 44*eb2b193dSPankaj Gupta$(eval $(call add_define,CONFIG_POVDD_ENABLE)) 45*eb2b193dSPankaj Guptaendif 46*eb2b193dSPankaj Gupta 47*eb2b193dSPankaj Guptaifneq (${FLASH_TYPE},) 48*eb2b193dSPankaj Gupta$(eval $(call add_define,CONFIG_${FLASH_TYPE})) 49*eb2b193dSPankaj Guptaendif 50*eb2b193dSPankaj Gupta 51*eb2b193dSPankaj Guptaifneq (${XSPI_FLASH_SZ},) 52*eb2b193dSPankaj Gupta$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ})) 53*eb2b193dSPankaj Guptaendif 54*eb2b193dSPankaj Gupta 55*eb2b193dSPankaj Guptaifneq (${FSPI_ERASE_4K},) 56*eb2b193dSPankaj Gupta$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K})) 57*eb2b193dSPankaj Guptaendif 58*eb2b193dSPankaj Gupta 59*eb2b193dSPankaj Guptaifneq (${NUM_OF_DDRC},) 60*eb2b193dSPankaj Gupta$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC})) 61*eb2b193dSPankaj Guptaendif 62*eb2b193dSPankaj Gupta 63*eb2b193dSPankaj Guptaifneq (${DDRC_NUM_DIMM},) 64*eb2b193dSPankaj Gupta$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM})) 65*eb2b193dSPankaj Guptaendif 66*eb2b193dSPankaj Gupta 67*eb2b193dSPankaj Guptaifneq (${DDRC_NUM_CS},) 68*eb2b193dSPankaj Gupta$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS})) 69*eb2b193dSPankaj Guptaendif 70*eb2b193dSPankaj Gupta 71*eb2b193dSPankaj Guptaifeq (${DDR_ADDR_DEC},yes) 72*eb2b193dSPankaj Gupta$(eval $(call add_define,CONFIG_DDR_ADDR_DEC)) 73*eb2b193dSPankaj Guptaendif 74*eb2b193dSPankaj Gupta 75*eb2b193dSPankaj Guptaifeq (${DDR_ECC_EN},yes) 76*eb2b193dSPankaj Gupta$(eval $(call add_define,CONFIG_DDR_ECC_EN)) 77*eb2b193dSPankaj Guptaendif 78*eb2b193dSPankaj Gupta 79*eb2b193dSPankaj Gupta# Platform can control the base address for non-volatile storage. 80*eb2b193dSPankaj Gupta#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}')) 81*eb2b193dSPankaj Gupta 82*eb2b193dSPankaj Guptaifeq (${WARM_BOOT},yes) 83*eb2b193dSPankaj Gupta$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}')) 84*eb2b193dSPankaj Guptaendif 85*eb2b193dSPankaj Gupta 86*eb2b193dSPankaj Gupta # Adding Platform files build files 87*eb2b193dSPankaj GuptaBL2_SOURCES += ${BOARD_PATH}/ddr_init.c\ 88*eb2b193dSPankaj Gupta ${BOARD_PATH}/platform.c 89*eb2b193dSPankaj Gupta 90*eb2b193dSPankaj Gupta # Adding SoC build info 91*eb2b193dSPankaj Guptainclude plat/nxp/soc-lx2160a/soc.mk 92