1*f359a382SPankaj Gupta# 2*f359a382SPankaj Gupta# Copyright 2018-2020 NXP 3*f359a382SPankaj Gupta# 4*f359a382SPankaj Gupta# SPDX-License-Identifier: BSD-3-Clause 5*f359a382SPankaj Gupta# 6*f359a382SPankaj Gupta 7*f359a382SPankaj Gupta# board-specific build parameters 8*f359a382SPankaj Gupta 9*f359a382SPankaj GuptaBOOT_MODE ?= flexspi_nor 10*f359a382SPankaj GuptaBOARD ?= lx2160aqds 11*f359a382SPankaj GuptaPOVDD_ENABLE := no 12*f359a382SPankaj GuptaNXP_COINED_BB := no 13*f359a382SPankaj Gupta 14*f359a382SPankaj Gupta # DDR Compilation Configs 15*f359a382SPankaj GuptaNUM_OF_DDRC := 1 16*f359a382SPankaj GuptaDDRC_NUM_DIMM := 1 17*f359a382SPankaj GuptaDDRC_NUM_CS := 2 18*f359a382SPankaj GuptaDDR_ECC_EN := yes 19*f359a382SPankaj Gupta #enable address decoding feature 20*f359a382SPankaj GuptaDDR_ADDR_DEC := yes 21*f359a382SPankaj GuptaAPPLY_MAX_CDD := yes 22*f359a382SPankaj Gupta 23*f359a382SPankaj Gupta# DDR Errata 24*f359a382SPankaj GuptaERRATA_DDR_A011396 := 1 25*f359a382SPankaj GuptaERRATA_DDR_A050450 := 1 26*f359a382SPankaj Gupta 27*f359a382SPankaj Gupta # On-Board Flash Details 28*f359a382SPankaj GuptaFLASH_TYPE := MT35XU512A 29*f359a382SPankaj GuptaXSPI_FLASH_SZ := 0x10000000 30*f359a382SPankaj GuptaNXP_XSPI_NOR_UNIT_SIZE := 0x20000 31*f359a382SPankaj GuptaBL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000 32*f359a382SPankaj Gupta# CONFIG_FSPI_ERASE_4K is required to erase 4K sector sizes. This 33*f359a382SPankaj Gupta# config is enabled for future use cases. 34*f359a382SPankaj GuptaFSPI_ERASE_4K := 0 35*f359a382SPankaj Gupta 36*f359a382SPankaj Gupta # Platform specific features. 37*f359a382SPankaj GuptaWARM_BOOT := yes 38*f359a382SPankaj Gupta 39*f359a382SPankaj Gupta # Adding platform specific defines 40*f359a382SPankaj Gupta 41*f359a382SPankaj Gupta$(eval $(call add_define_val,BOARD,'"${BOARD}"')) 42*f359a382SPankaj Gupta 43*f359a382SPankaj Guptaifeq (${POVDD_ENABLE},yes) 44*f359a382SPankaj Gupta$(eval $(call add_define,CONFIG_POVDD_ENABLE)) 45*f359a382SPankaj Guptaendif 46*f359a382SPankaj Gupta 47*f359a382SPankaj Guptaifneq (${FLASH_TYPE},) 48*f359a382SPankaj Gupta$(eval $(call add_define,CONFIG_${FLASH_TYPE})) 49*f359a382SPankaj Guptaendif 50*f359a382SPankaj Gupta 51*f359a382SPankaj Guptaifneq (${XSPI_FLASH_SZ},) 52*f359a382SPankaj Gupta$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ})) 53*f359a382SPankaj Guptaendif 54*f359a382SPankaj Gupta 55*f359a382SPankaj Guptaifneq (${FSPI_ERASE_4K},) 56*f359a382SPankaj Gupta$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K})) 57*f359a382SPankaj Guptaendif 58*f359a382SPankaj Gupta 59*f359a382SPankaj Guptaifneq (${NUM_OF_DDRC},) 60*f359a382SPankaj Gupta$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC})) 61*f359a382SPankaj Guptaendif 62*f359a382SPankaj Gupta 63*f359a382SPankaj Guptaifneq (${DDRC_NUM_DIMM},) 64*f359a382SPankaj Gupta$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM})) 65*f359a382SPankaj Guptaendif 66*f359a382SPankaj Gupta 67*f359a382SPankaj Guptaifneq (${DDRC_NUM_CS},) 68*f359a382SPankaj Gupta$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS})) 69*f359a382SPankaj Guptaendif 70*f359a382SPankaj Gupta 71*f359a382SPankaj Guptaifeq (${DDR_ADDR_DEC},yes) 72*f359a382SPankaj Gupta$(eval $(call add_define,CONFIG_DDR_ADDR_DEC)) 73*f359a382SPankaj Guptaendif 74*f359a382SPankaj Gupta 75*f359a382SPankaj Guptaifeq (${DDR_ECC_EN},yes) 76*f359a382SPankaj Gupta$(eval $(call add_define,CONFIG_DDR_ECC_EN)) 77*f359a382SPankaj Guptaendif 78*f359a382SPankaj Gupta 79*f359a382SPankaj Gupta# Platform can control the base address for non-volatile storage. 80*f359a382SPankaj Gupta#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}')) 81*f359a382SPankaj Gupta 82*f359a382SPankaj Guptaifeq (${WARM_BOOT},yes) 83*f359a382SPankaj Gupta$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}')) 84*f359a382SPankaj Guptaendif 85*f359a382SPankaj Gupta 86*f359a382SPankaj Gupta # Adding Platform files build files 87*f359a382SPankaj GuptaBL2_SOURCES += ${BOARD_PATH}/ddr_init.c\ 88*f359a382SPankaj Gupta ${BOARD_PATH}/platform.c 89*f359a382SPankaj Gupta 90*f359a382SPankaj Gupta # Adding SoC build info 91*f359a382SPankaj Guptainclude plat/nxp/soc-lx2160a/soc.mk 92