1*9df5ba05SJiafei Pan# 2*9df5ba05SJiafei Pan# Copyright 2022 NXP 3*9df5ba05SJiafei Pan# 4*9df5ba05SJiafei Pan# SPDX-License-Identifier: BSD-3-Clause 5*9df5ba05SJiafei Pan# 6*9df5ba05SJiafei Pan 7*9df5ba05SJiafei Pan# SoC-specific build parameters 8*9df5ba05SJiafei PanSOC := ls1088a 9*9df5ba05SJiafei PanPLAT_PATH := plat/nxp 10*9df5ba05SJiafei PanPLAT_COMMON_PATH:= plat/nxp/common 11*9df5ba05SJiafei PanPLAT_DRIVERS_PATH:= drivers/nxp 12*9df5ba05SJiafei PanPLAT_SOC_PATH := ${PLAT_PATH}/soc-${SOC} 13*9df5ba05SJiafei PanBOARD_PATH := ${PLAT_SOC_PATH}/${BOARD} 14*9df5ba05SJiafei Pan 15*9df5ba05SJiafei Pan# Separate BL2 NOLOAD region (.bss, stack, page tables). need to 16*9df5ba05SJiafei Pan# define BL2_NOLOAD_START and BL2_NOLOAD_LIMIT 17*9df5ba05SJiafei PanSEPARATE_BL2_NOLOAD_REGION := 1 18*9df5ba05SJiafei Pan 19*9df5ba05SJiafei Pan# get SoC-specific defnitions 20*9df5ba05SJiafei Paninclude ${PLAT_SOC_PATH}/soc.def 21*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/soc_common_def.mk 22*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk 23*9df5ba05SJiafei Pan 24*9df5ba05SJiafei Pan# For Security Features 25*9df5ba05SJiafei PanDISABLE_FUSE_WRITE := 1 26*9df5ba05SJiafei Panifeq (${TRUSTED_BOARD_BOOT}, 1) 27*9df5ba05SJiafei Panifeq (${GENERATE_COT},1) 28*9df5ba05SJiafei Pan# Save Keys to be used by DDR FIP image 29*9df5ba05SJiafei PanSAVE_KEYS=1 30*9df5ba05SJiafei Panendif 31*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SMMU_NEEDED,BL2)) 32*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SFP_NEEDED,BL2)) 33*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL2)) 34*9df5ba05SJiafei Pan# Used by create_pbl tool to 35*9df5ba05SJiafei Pan# create bl2_<boot_mode>_sec.pbl image 36*9df5ba05SJiafei PanSECURE_BOOT := yes 37*9df5ba05SJiafei Panendif 38*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CRYPTO_NEEDED,BL_COMM)) 39*9df5ba05SJiafei Pan 40*9df5ba05SJiafei Pan# Selecting Drivers for SoC 41*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DCFG_NEEDED,BL_COMM)) 42*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TIMER_NEEDED,BL_COMM)) 43*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,INTERCONNECT_NEEDED,BL_COMM)) 44*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,GIC_NEEDED,BL31)) 45*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CONSOLE_NEEDED,BL_COMM)) 46*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PMU_NEEDED,BL_COMM)) 47*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DDR_DRIVER_NEEDED,BL2)) 48*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TZASC_NEEDED,BL2)) 49*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,I2C_NEEDED,BL2)) 50*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,IMG_LOADR_NEEDED,BL2)) 51*9df5ba05SJiafei Pan 52*9df5ba05SJiafei Pan# Selecting PSCI & SIP_SVC support 53*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PSCI_NEEDED,BL31)) 54*9df5ba05SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SIPSVC_NEEDED,BL31)) 55*9df5ba05SJiafei Pan 56*9df5ba05SJiafei Pan 57*9df5ba05SJiafei Pan# Adding SoC specific files 58*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/soc_errata/errata.mk 59*9df5ba05SJiafei Pan 60*9df5ba05SJiafei PanPLAT_INCLUDES += -I${PLAT_COMMON_PATH}/include/default\ 61*9df5ba05SJiafei Pan -I${BOARD_PATH}\ 62*9df5ba05SJiafei Pan -I${PLAT_COMMON_PATH}/include/default/ch_${CHASSIS}\ 63*9df5ba05SJiafei Pan -I${PLAT_COMMON_PATH}/soc_errata\ 64*9df5ba05SJiafei Pan -I${PLAT_COMMON_PATH}/include\ 65*9df5ba05SJiafei Pan -I${PLAT_SOC_PATH}/include 66*9df5ba05SJiafei Pan 67*9df5ba05SJiafei Panifeq (${SECURE_BOOT},yes) 68*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/tbbr/tbbr.mk 69*9df5ba05SJiafei Panendif 70*9df5ba05SJiafei Pan 71*9df5ba05SJiafei Panifeq (${PSCI_NEEDED}, yes) 72*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/psci/psci.mk 73*9df5ba05SJiafei Panendif 74*9df5ba05SJiafei Pan 75*9df5ba05SJiafei Panifeq (${SIPSVC_NEEDED}, yes) 76*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/sip_svc/sipsvc.mk 77*9df5ba05SJiafei Panendif 78*9df5ba05SJiafei Pan 79*9df5ba05SJiafei Pan# for fuse-fip & fuse-programming 80*9df5ba05SJiafei Panifeq (${FUSE_PROG}, 1) 81*9df5ba05SJiafei Paninclude ${PLAT_COMMON_PATH}/fip_handler/fuse_fip/fuse.mk 82*9df5ba05SJiafei Panendif 83*9df5ba05SJiafei Pan 84*9df5ba05SJiafei Panifeq (${IMG_LOADR_NEEDED},yes) 85*9df5ba05SJiafei Paninclude $(PLAT_COMMON_PATH)/img_loadr/img_loadr.mk 86*9df5ba05SJiafei Panendif 87*9df5ba05SJiafei Pan 88*9df5ba05SJiafei Pan# Adding source files for the above selected drivers. 89*9df5ba05SJiafei Paninclude ${PLAT_DRIVERS_PATH}/drivers.mk 90*9df5ba05SJiafei Pan 91*9df5ba05SJiafei PanPLAT_BL_COMMON_SOURCES += ${PLAT_COMMON_PATH}/$(ARCH)/ls_helpers.S\ 92*9df5ba05SJiafei Pan ${PLAT_SOC_PATH}/${ARCH}/${SOC}_helpers.S\ 93*9df5ba05SJiafei Pan ${PLAT_SOC_PATH}/soc.c 94*9df5ba05SJiafei Pan 95*9df5ba05SJiafei PanBL31_SOURCES += ${PLAT_SOC_PATH}/$(ARCH)/${SOC}.S\ 96*9df5ba05SJiafei Pan ${PSCI_SOURCES}\ 97*9df5ba05SJiafei Pan ${SIPSVC_SOURCES}\ 98*9df5ba05SJiafei Pan ${PLAT_COMMON_PATH}/$(ARCH)/bl31_data.S 99*9df5ba05SJiafei Pan 100*9df5ba05SJiafei Panifeq (${TEST_BL31}, 1) 101*9df5ba05SJiafei PanBL31_SOURCES += ${PLAT_SOC_PATH}/$(ARCH)/bootmain64.S \ 102*9df5ba05SJiafei Pan ${PLAT_SOC_PATH}/$(ARCH)/nonboot64.S 103*9df5ba05SJiafei Panendif 104*9df5ba05SJiafei Pan 105*9df5ba05SJiafei PanBL2_SOURCES += ${DDR_CNTLR_SOURCES}\ 106*9df5ba05SJiafei Pan ${TBBR_SOURCES}\ 107*9df5ba05SJiafei Pan ${FUSE_SOURCES} 108*9df5ba05SJiafei Pan 109*9df5ba05SJiafei Pan# Adding TFA setup files 110*9df5ba05SJiafei Paninclude ${PLAT_PATH}/common/setup/common.mk 111