1*2771dd02SJiafei Pan /* 2*2771dd02SJiafei Pan * Copyright 2022 NXP 3*2771dd02SJiafei Pan * 4*2771dd02SJiafei Pan * SPDX-License-Identifier: BSD-3-Clause 5*2771dd02SJiafei Pan */ 6*2771dd02SJiafei Pan 7*2771dd02SJiafei Pan #ifndef POLICY_H 8*2771dd02SJiafei Pan #define POLICY_H 9*2771dd02SJiafei Pan 10*2771dd02SJiafei Pan /* Set this to 0x0 to leave the default SMMU page size in sACR 11*2771dd02SJiafei Pan * Set this to 0x1 to change the SMMU page size to 64K 12*2771dd02SJiafei Pan */ 13*2771dd02SJiafei Pan #define POLICY_SMMU_PAGESZ_64K 0x1 14*2771dd02SJiafei Pan 15*2771dd02SJiafei Pan #endif /* POLICY_H */ 16