1*2771dd02SJiafei Pan /* 2*2771dd02SJiafei Pan * Copyright 2022 NXP 3*2771dd02SJiafei Pan * 4*2771dd02SJiafei Pan * SPDX-License-Identifier: BSD-3-Clause 5*2771dd02SJiafei Pan */ 6*2771dd02SJiafei Pan 7*2771dd02SJiafei Pan #include <plat_common.h> 8*2771dd02SJiafei Pan 9*2771dd02SJiafei Pan #pragma weak board_enable_povdd 10*2771dd02SJiafei Pan #pragma weak board_disable_povdd 11*2771dd02SJiafei Pan 12*2771dd02SJiafei Pan bool board_enable_povdd(void) 13*2771dd02SJiafei Pan { 14*2771dd02SJiafei Pan #ifdef CONFIG_POVDD_ENABLE 15*2771dd02SJiafei Pan return true; 16*2771dd02SJiafei Pan #else 17*2771dd02SJiafei Pan return false; 18*2771dd02SJiafei Pan #endif 19*2771dd02SJiafei Pan } 20*2771dd02SJiafei Pan 21*2771dd02SJiafei Pan bool board_disable_povdd(void) 22*2771dd02SJiafei Pan { 23*2771dd02SJiafei Pan #ifdef CONFIG_POVDD_ENABLE 24*2771dd02SJiafei Pan return true; 25*2771dd02SJiafei Pan #else 26*2771dd02SJiafei Pan return false; 27*2771dd02SJiafei Pan #endif 28*2771dd02SJiafei Pan } 29