1*0b0e6766SJiafei Pan /* 2*0b0e6766SJiafei Pan * Copyright 2022 NXP 3*0b0e6766SJiafei Pan * 4*0b0e6766SJiafei Pan * SPDX-License-Identifier: BSD-3-Clause 5*0b0e6766SJiafei Pan */ 6*0b0e6766SJiafei Pan 7*0b0e6766SJiafei Pan #include <plat_common.h> 8*0b0e6766SJiafei Pan 9*0b0e6766SJiafei Pan #pragma weak board_enable_povdd 10*0b0e6766SJiafei Pan #pragma weak board_disable_povdd 11*0b0e6766SJiafei Pan 12*0b0e6766SJiafei Pan bool board_enable_povdd(void) 13*0b0e6766SJiafei Pan { 14*0b0e6766SJiafei Pan #ifdef CONFIG_POVDD_ENABLE 15*0b0e6766SJiafei Pan return true; 16*0b0e6766SJiafei Pan #else 17*0b0e6766SJiafei Pan return false; 18*0b0e6766SJiafei Pan #endif 19*0b0e6766SJiafei Pan } 20*0b0e6766SJiafei Pan 21*0b0e6766SJiafei Pan bool board_disable_povdd(void) 22*0b0e6766SJiafei Pan { 23*0b0e6766SJiafei Pan #ifdef CONFIG_POVDD_ENABLE 24*0b0e6766SJiafei Pan return true; 25*0b0e6766SJiafei Pan #else 26*0b0e6766SJiafei Pan return false; 27*0b0e6766SJiafei Pan #endif 28*0b0e6766SJiafei Pan } 29