1*bb52f756SJiafei Pan /* 2*bb52f756SJiafei Pan * Copyright 2022 NXP 3*bb52f756SJiafei Pan * 4*bb52f756SJiafei Pan * SPDX-License-Identifier: BSD-3-Clause 5*bb52f756SJiafei Pan * 6*bb52f756SJiafei Pan */ 7*bb52f756SJiafei Pan 8*bb52f756SJiafei Pan #ifndef POLICY_H 9*bb52f756SJiafei Pan #define POLICY_H 10*bb52f756SJiafei Pan 11*bb52f756SJiafei Pan /* Set this to 0x0 to leave the default SMMU page size in sACR 12*bb52f756SJiafei Pan * Set this to 0x1 to change the SMMU page size to 64K 13*bb52f756SJiafei Pan */ 14*bb52f756SJiafei Pan #define POLICY_SMMU_PAGESZ_64K 0x1 15*bb52f756SJiafei Pan 16*bb52f756SJiafei Pan #endif /* POLICY_H */ 17