xref: /rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046afrwy/platform.c (revision b51dc56ab9ea79e4709f0d0ce965525d0d3da918)
1*b51dc56aSJiafei Pan /*
2*b51dc56aSJiafei Pan  * Copyright 2020-2022 NXP
3*b51dc56aSJiafei Pan  *
4*b51dc56aSJiafei Pan  * SPDX-License-Identifier: BSD-3-Clause
5*b51dc56aSJiafei Pan  */
6*b51dc56aSJiafei Pan 
7*b51dc56aSJiafei Pan #include <plat_common.h>
8*b51dc56aSJiafei Pan 
9*b51dc56aSJiafei Pan #pragma weak board_enable_povdd
10*b51dc56aSJiafei Pan #pragma weak board_disable_povdd
11*b51dc56aSJiafei Pan 
12*b51dc56aSJiafei Pan bool board_enable_povdd(void)
13*b51dc56aSJiafei Pan {
14*b51dc56aSJiafei Pan #ifdef CONFIG_POVDD_ENABLE
15*b51dc56aSJiafei Pan 	return true;
16*b51dc56aSJiafei Pan #else
17*b51dc56aSJiafei Pan 	return false;
18*b51dc56aSJiafei Pan #endif
19*b51dc56aSJiafei Pan }
20*b51dc56aSJiafei Pan 
21*b51dc56aSJiafei Pan bool board_disable_povdd(void)
22*b51dc56aSJiafei Pan {
23*b51dc56aSJiafei Pan #ifdef CONFIG_POVDD_ENABLE
24*b51dc56aSJiafei Pan 	return true;
25*b51dc56aSJiafei Pan #else
26*b51dc56aSJiafei Pan 	return false;
27*b51dc56aSJiafei Pan #endif
28*b51dc56aSJiafei Pan }
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