1*3b0de918SJiafei Pan# 2*3b0de918SJiafei Pan# Copyright 2018-2021 NXP 3*3b0de918SJiafei Pan# 4*3b0de918SJiafei Pan# SPDX-License-Identifier: BSD-3-Clause 5*3b0de918SJiafei Pan# 6*3b0de918SJiafei Pan 7*3b0de918SJiafei Pan# SoC-specific build parameters 8*3b0de918SJiafei PanSOC := ls1043a 9*3b0de918SJiafei PanPLAT_PATH := plat/nxp 10*3b0de918SJiafei PanPLAT_COMMON_PATH := plat/nxp/common 11*3b0de918SJiafei PanPLAT_DRIVERS_PATH := drivers/nxp 12*3b0de918SJiafei PanPLAT_SOC_PATH := ${PLAT_PATH}/soc-${SOC} 13*3b0de918SJiafei PanBOARD_PATH := ${PLAT_SOC_PATH}/${BOARD} 14*3b0de918SJiafei Pan 15*3b0de918SJiafei Pan# get SoC-specific defnitions 16*3b0de918SJiafei Paninclude ${PLAT_SOC_PATH}/soc.def 17*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/soc_common_def.mk 18*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk 19*3b0de918SJiafei Pan 20*3b0de918SJiafei Pan# For Security Features 21*3b0de918SJiafei PanDISABLE_FUSE_WRITE := 1 22*3b0de918SJiafei Panifeq (${TRUSTED_BOARD_BOOT}, 1) 23*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SMMU_NEEDED,BL2)) 24*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SFP_NEEDED,BL2)) 25*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL2)) 26*3b0de918SJiafei PanSECURE_BOOT := yes 27*3b0de918SJiafei Panendif 28*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CRYPTO_NEEDED,BL_COMM)) 29*3b0de918SJiafei Pan 30*3b0de918SJiafei Pan# Selecting Drivers for SoC 31*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DCFG_NEEDED,BL_COMM)) 32*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CSU_NEEDED,BL_COMM)) 33*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TIMER_NEEDED,BL_COMM)) 34*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,INTERCONNECT_NEEDED,BL_COMM)) 35*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,GIC_NEEDED,BL31)) 36*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CONSOLE_NEEDED,BL_COMM)) 37*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PMU_NEEDED,BL_COMM)) 38*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DDR_DRIVER_NEEDED,BL2)) 39*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TZASC_NEEDED,BL2)) 40*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,I2C_NEEDED,BL2)) 41*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,IMG_LOADR_NEEDED,BL2)) 42*3b0de918SJiafei Pan 43*3b0de918SJiafei Pan# Selecting PSCI & SIP_SVC support 44*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PSCI_NEEDED,BL31)) 45*3b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SIPSVC_NEEDED,BL31)) 46*3b0de918SJiafei Pan 47*3b0de918SJiafei Pan# Source File Addition 48*3b0de918SJiafei PanPLAT_INCLUDES += -I${PLAT_COMMON_PATH}/include/default\ 49*3b0de918SJiafei Pan -I${BOARD_PATH}\ 50*3b0de918SJiafei Pan -I${PLAT_COMMON_PATH}/include/default/ch_${CHASSIS}\ 51*3b0de918SJiafei Pan -I${PLAT_SOC_PATH}/include\ 52*3b0de918SJiafei Pan -I${PLAT_COMMON_PATH}/soc_errata 53*3b0de918SJiafei Pan 54*3b0de918SJiafei Panifeq (${SECURE_BOOT},yes) 55*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/tbbr/tbbr.mk 56*3b0de918SJiafei Panendif 57*3b0de918SJiafei Pan 58*3b0de918SJiafei Panifeq ($(WARM_BOOT),yes) 59*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/warm_reset/warm_reset.mk 60*3b0de918SJiafei Panendif 61*3b0de918SJiafei Pan 62*3b0de918SJiafei Panifeq (${NXP_NV_SW_MAINT_LAST_EXEC_DATA}, yes) 63*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/nv_storage/nv_storage.mk 64*3b0de918SJiafei Panendif 65*3b0de918SJiafei Pan 66*3b0de918SJiafei Panifeq (${PSCI_NEEDED}, yes) 67*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/psci/psci.mk 68*3b0de918SJiafei Panendif 69*3b0de918SJiafei Pan 70*3b0de918SJiafei Panifeq (${SIPSVC_NEEDED}, yes) 71*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/sip_svc/sipsvc.mk 72*3b0de918SJiafei Panendif 73*3b0de918SJiafei Pan 74*3b0de918SJiafei Pan# for fuse-fip & fuse-programming 75*3b0de918SJiafei Panifeq (${FUSE_PROG}, 1) 76*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/fip_handler/fuse_fip/fuse.mk 77*3b0de918SJiafei Panendif 78*3b0de918SJiafei Pan 79*3b0de918SJiafei Panifeq (${IMG_LOADR_NEEDED},yes) 80*3b0de918SJiafei Paninclude $(PLAT_COMMON_PATH)/img_loadr/img_loadr.mk 81*3b0de918SJiafei Panendif 82*3b0de918SJiafei Pan 83*3b0de918SJiafei Pan# Adding source files for the above selected drivers. 84*3b0de918SJiafei Paninclude ${PLAT_DRIVERS_PATH}/drivers.mk 85*3b0de918SJiafei Pan 86*3b0de918SJiafei Pan# Adding SoC specific files 87*3b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/soc_errata/errata.mk 88*3b0de918SJiafei Pan 89*3b0de918SJiafei PanPLAT_INCLUDES += ${NV_STORAGE_INCLUDES}\ 90*3b0de918SJiafei Pan ${WARM_RST_INCLUDES} 91*3b0de918SJiafei Pan 92*3b0de918SJiafei PanBL31_SOURCES += ${PLAT_SOC_PATH}/$(ARCH)/${SOC}.S\ 93*3b0de918SJiafei Pan ${WARM_RST_BL31_SOURCES}\ 94*3b0de918SJiafei Pan ${PSCI_SOURCES}\ 95*3b0de918SJiafei Pan ${SIPSVC_SOURCES}\ 96*3b0de918SJiafei Pan ${PLAT_COMMON_PATH}/$(ARCH)/bl31_data.S 97*3b0de918SJiafei Pan 98*3b0de918SJiafei PanPLAT_BL_COMMON_SOURCES += ${PLAT_COMMON_PATH}/$(ARCH)/ls_helpers.S\ 99*3b0de918SJiafei Pan ${PLAT_SOC_PATH}/aarch64/${SOC}_helpers.S\ 100*3b0de918SJiafei Pan ${NV_STORAGE_SOURCES}\ 101*3b0de918SJiafei Pan ${WARM_RST_BL_COMM_SOURCES}\ 102*3b0de918SJiafei Pan ${PLAT_SOC_PATH}/soc.c 103*3b0de918SJiafei Pan 104*3b0de918SJiafei Panifeq (${TEST_BL31}, 1) 105*3b0de918SJiafei PanBL31_SOURCES += ${PLAT_SOC_PATH}/$(ARCH)/bootmain64.S\ 106*3b0de918SJiafei Pan ${PLAT_SOC_PATH}/$(ARCH)/nonboot64.S 107*3b0de918SJiafei Panendif 108*3b0de918SJiafei Pan 109*3b0de918SJiafei PanBL2_SOURCES += ${DDR_CNTLR_SOURCES}\ 110*3b0de918SJiafei Pan ${TBBR_SOURCES}\ 111*3b0de918SJiafei Pan ${FUSE_SOURCES} 112*3b0de918SJiafei Pan 113*3b0de918SJiafei Pan# Adding TFA setup files 114*3b0de918SJiafei Paninclude ${PLAT_PATH}/common/setup/common.mk 115